MT9161B Datasheet, PDF (25/30 Pages) Mitel Networks Corporation – ISO2-CMOS 5 Volt Multi-Featured Codec (MFC)

MT9160B/61B
Advance Information
T_j
STB
Dout
Din
70%
30%
70%
30%
t_dda1
70%
30%
t_dda2
t_dha1
Bit 1
T_DATA1
t_ho
t_su
Bit 2
Bit 3
T_DATA
D1
T_DATA/2
T_DATA
D2
D3
T_DATA
NOTE: Levels refer to % V_DD (CMOS I/O)
Figure 13 - SSI Asynchronous Timing Diagram
AC Electrical Characteristics^† - Microport Timing (see figure 14)
Characteristics
Sym Min Typ^‡ Max Units
Test Conditions
1 Input data setup
t_IDS
100
ns
2 Input data hold
t_IDH
30
ns
3 Output data delay
t_ODD
100
ns C_L = 150pF, R_L = 1K *
4 Serial clock period
t_CYC
500 1000
ns
5 SCLK pulse width high
t_CH
250 500
ns
6 SCLK pulse width low
t_CL
250 500
ns
7 CS setup-Intel
t_CSSI
200
ns
8 CS setup-Motorola
t_CSSM 200
ns
9 CS hold
t_CSH
100
ns
10 CS to output high impedance
t_OHZ
100
ns C_L = 150pF, R_L = 1K
† Timing is over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* Note: All conditions → data-data, data-HiZ, HiZ-data.
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