MT91L61 Datasheet, PDF (17/32 Pages) Mitel Networks Corporation – ISO2-CMOS 3 Volt Multi-Featured Codec (MFC)

Advance Information
MT91L60/61
C-Channel Register
C7 C6 C5 C4 C3 C2 C1
7
6
5
4
3
2
1
Micro-port access to the ST-BUS C-Channel information read and write
ADDRESS = 05h WRITE/READ
Power Reset Value
C0
1111 1111- write
XXXX XXXX - read
0
D-Channel Register
D7 D6 D5 D4
7
6
5
4
ADDRESS = 06h WRITE/READ
D3 D2 D1 D0
3
2
1
0
Power Reset Value
1111 1111- write
XXXX XXXX - read
D7-D0
Data written to this register will be transmitted every frame, in channel 0, if the DEn control bit is set (address 04h).
Received D-Channel data is valid, regardless of the state of DEn. These bits are valid for ST-BUS mode only and are
accessible only when IRQ indicates valid access.
Loopback Register
ADDRESS = 07h WRITE/READ VERIFY
-
-
-
-
PCM/ _loopen
-
ANALOG
-
Power Reset Value
XXXX 0000
7
6
5
4
3
2
1
0
PCM/ANALOG This control bit functions only when loopen is set high. It is ignored when loopen is low.
For loopback operation when this bit is high, the device is configured for digital-to-digital loopback operation. Data on
Din is looped back to Dout without conversion to the analog domain. However, the receive D/A path (from Din to
HSPKR ±) still functions. When low, the device is configured for analog-to-analog operation. An analog input signal at
M± is looped back to the SPKR± outputs through the A/D and D/A circuits as well as through the normal transmit A/D
path (from M± to Dout).
loopen
When high, loopback operation is enabled and the loopback type is governed by the state of the PCM/ANALOG bit.
When low, loopbacks are disabled, the device operates normally and the PCM/ANALOG bit is ignored.
HSPKR +/-
Din
HSPKR +/-
Dout
M +/-
Dout
Analog Loopback
PCM/ANALOG = 0 loopen = 1
Digital Loopback
PCM/ANALOG = 1 loopen = 1
Figure 10 - Loopback Signal Flow
Note: Bits marked "-" are reserved bits and should be written with logic "0"
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