MT91L61 Datasheet, PDF (1/32 Pages) Mitel Networks Corporation – ISO2-CMOS 3 Volt Multi-Featured Codec (MFC)

ISO²-CMOS MT91L60/61
3 Volt Multi-Featured Codec (MFC)
Advance Information
Features
• Single 2.7-3.6 volt supply operation
• MT91L61 version features a delayed framing
pulse in SSI and ST-BUS modes to facilitate
cascaded devices
• Programmable µ-Law/A-Law Codec and Filters
• Programmable ITU-T (G.711)/sign-magnitude
coding
• Programmable transmit, receive and side-tone
gains
• Fully differential interface to handset
transducers - including 300 ohm receiver driver
• Flexible digital interface including ST-BUS/SSI
• Serial microport
• Low power operation
• ITU-T G.714 compliant
• Multiple power down modes
Applications
• Battery operated equipment
• Digital telephone sets
• Cellular radio sets
• Local area communications stations
• Pair Gain Systems
• Line cards
DS5224
ISSUE 3
August 1999
Ordering Information
MT91L61AE
MT91L60AE
MT91L61AS
MT91L60AS
MT91L61AN
MT91L60AN
24 Pin Plastic DIP (600 mil)
24 Pin Plastic DIP (600 mil)
24 Pin SOIC
20 Pin SOIC
24 Pin SSOP
20 Pin SSOP
-40°C to +85°C
Description
The MT91L60/61 3V Multi-featured Codec
incorporates a built-in Filter/Codec, gain control and
programmable sidetone path as well as on-chip
anti-alias filters, reference voltage and bias source.
The device supports both ITU-T and sign- magnitude
A-Law and µ-Law requirements. The MT91L60/61 is
a true 3V device employing a fully differential
architecture to ensure wide dynamic range.
Complete telephony interfaces are provided for
connection to handset transducers. Internal register
access is provided through a serial microport
compatible with various industry standard
micro-controllers.
The MT91L60/61 is fabricated in Mitel's ISO²-CMOS
technology ensuring low power consumption and
high reliability.
VSSD
VDD
VSSA
VBias
VRef
Din
Dout
STB/F0i
CLOCKin
STBd/FOod
(MT91L61only)
FILTER/CODEC GAIN
ENCODER 7dB
DECODER -7dB
Transducer
Interface
Flexible
Digital
Interface
Timing
ST-BUS
C&D
Channels
Serial Microport
PWRST IC
CS DATA1 DATA2 SCLK
Figure 1 - Functional Block Diagram
M-
M+
HSPKR +
HSPKR -
A/µ/IRQ
1