PDSP1601_96 Datasheet, PDF (15/18 Pages) Mitel Networks Corporation – ALU and Barrel Shifter

PDSP1601/PDSP1601A
ELECTRICAL CHARACTERISTICS
Operating Conditions (unless otherwise stated)
T_AMB (Commercial) = 0°C to +70°C, V_CC = 5.0V±5%, Ground = 0V
T_AMB (Industrial) = -40°C to +85°C, V_CC = 5.0V±10%, Ground = 0V
T_AMB (Military) = -55°C to +125°C, V_CC = 5.0V±10%, Ground = 0V
Static Characteristics
Characteristic
Symbol
Value
Min. Typ. Max.
Units Conditions
Output high voltage
V_OH
Output low voltage
V_OL
Input high voltage
V_IH
Input low voltage
V_IL
Input leakage current
I_IL
Vcc current
I_CC
Output leakage current
I_OZ
Output S/C current
I_SC
Input capacitance
C_IN
Switching Characteristics
Characteristic
2.4
V
I_OH = 8mA
0.4
V
I_OL = -8mA
3.5
V
0.5
V
-10
+10
µA
GND < V_IN < V_CC
60
mA
T_amb = -40°C to +85°C
-50
+50
µA
GND < V_OUT < V_CC
12
80
mA
V_CC = Max
5
pF
Value
PDSP1601 PDSP1601/A _Units
Min. Max. Min. Max.
Conditions
CLK rising edge to C-PORT
CLK rising edge to CO
CLK rising edge to BFP
Setup CEA or CEB to CLK rising edge
Hold CEA or CEB after CLK rising edge
Setup A or B port inputs to CLK rising edge
Hold A or B port inputs after CLK rising edge
Setup MSA0-1, MSB, MSS, MSC, RA2-0, RS0-2, IA0-4,
5 40 5 25
5 100 5 50
5 100 5 50
30
15
0
0
40
20
0
0
40
20
IS0-3, to CLK rising edge
Hold RS0-2, IA0-4 after CLK rising edge
0
0
Hold IS0-3 after CLK rising edge
3
3
Hold MSA0-1, MSB, MSS, MSC, RA0-2 after CLK rising edge
0
0
Setup SV to CLK rising edge
40
20
Hold SV after CLK rising edge
3
3
CLK rising edge to SV
5 100 5 50
OE C-PORT Z
40
25
OE C-PORT Z
40
25
OE C-PORT Z
40
25
OE C-PORT Z
40
25
Clock period (ALU & Barrel Shifter, serial mode)
200
100
Clock period (ALU & Barrel Shifter, parallel mode)
100
50
Clock high time
40
20
Clock low time
40
20
NOTES
1. LSTTL is equivalent to IOH at 20µA IOL of -0.4mA
2. Current is defined as negative into the device.
ns ^{2 x LSTTL + 20pF}
ns ^{1 x LSTTL + 5pF}
ns ^{1 x LSTTL + 5pF}
ns
ns
ns
ns
ns
ns
ns
ns
ns ^{Input mode}
ns ^{Input mode}
ns ^{20pF load, SV O P mode}
ns ^{2 x LSTTL + 20pF}
ns ^{2 x LSTTL + 20pF}
ns ^{2 x LSTTL + 20pF}
ns ^{2 x LSTTL + 20pF}
ns
ns
ns
ns
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