MYXPM6021 Datasheet, PDF (40/113 Pages) Micross Components – Tin-lead ball metallurgy

Figure 13: V1P0A Efficiency
MYXPM6021*
*Advanced information. Subject to change without notice.
9.6.3.2 V1P0A Subsystem
V1P0S:
This voltage rail powers the SoC graphic, display & DDR3 I/O, MIPI, clock and further functions. The current requirement
of this voltage rail is 410mA and requests an external switch providing this power rail to the SoC. MYXPM6021 provides
a control signal named V1P0S_EN supplied by V5P0S. When this signal is asserted (high), the slew rate is controlled in
order to limit the inrush current drawn via the external N-channel FET. The V1P0S_EN signal is derived from SLP_S3_B
signal sent out by the SoC.
V1P0S external N-channel power switch parameters:
Rdson (Vgs=4V)
Input capacitance, Ciss
Output capacitance, Coss
Reverse transfer capacitance, Crss
10-49mohm
700-2640pF
150-530pF
85-465pF
V1P0SX:
This voltage rail powers the SoC display & DDR3 I/O, PCIe and further functions. The current requirement of this voltage
rail is 916mA and requests an external switch providing this power rail to the SoC. MYXPM6021 provides a control signal
named V1P0SX_EN supplied by V5P0S.When this signal is asserted (high), the slew rate is controlled in order to limit the
inrush current drawn via the external N-channel FET. This signal is derived from SLP_S0iX_B signal sent out by the SoC.
MYXPM6021*
Revision 1.1 - 10/21/14
40
Form #: CSI-D-685 Document 011