A42MX24-PQ208I Datasheet, PDF (73/142 Pages) Microsemi Corporation – 40MX and 42MX FPGA Families

40MX and 42MX FPGA Families
Table 1-36 • A42MX24 Timing Characteristics (Nominal 5.0 V Operation) (continued)
(Worst-Case Commercial Conditions, VCCA = 4.75 V, T_J = 70°C)
–3 Speed –2 Speed –1 Speed Std Speed
–F Speed
Parameter / Description
TTL Output Module Timing⁵
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
t_DLH
t_DHL
t_ENZH
t_ENZL
t_ENHZ
t_ENLZ
t_GLH
t_GHL
t_LSU
t_LH
t_LCO
Data-to-Pad HIGH
Data-to-Pad LOW
Enable Pad Z to HIGH
Enable Pad Z to LOW
Enable Pad HIGH to Z
Enable Pad LOW to Z
G-to-Pad HIGH
G-to-Pad LOW
I/O Latch Output Set-Up
I/O Latch Output Hold
I/O Latch Clock-to-Out
(Pad-to-Pad) 32 I/O
2.4
2.7
3.1
3.6
5.1 ns
2.8
3.2
3.6
4.2
5.9 ns
2.5
2.8
3.2
3.8
5.3 ns
2.8
3.1
3.5
4.2
5.9 ns
5.2
5.7
6.5
7.6
10.7 ns
4.8
5.3
6.0
7.1
9.9 ns
2.9
3.2
3.6
4.3
6.0 ns
2.9
3.2
3.6
4.3
6.0 ns
0.5
0.5
0.6
0.7
1.0
ns
0.0
0.0
0.0
0.0
0.0
ns
5.6
6.1
6.9
8.1
11.4 ns
t_ACO
Array Latch Clock-to-Out
(Pad-to-Pad) 32 I/O
10.6
11.8
13.4
15.7
22.0 ns
d_TLH
Capacitive Loading, LOW to HIGH
0.04
0.04
0.04
0.05
0.07 ns/pF
d_THL
Capacitive Loading, HIGH to LOW
0.03
0.03
0.03
0.04
0.06 ns/pF
Notes:
1. For dual-module macros, use t_PD1 + t_RD1 + t_PDn, t_CO + t_RD1 + t_PDn, or t_PD1 + t_RD1 + t_SUD, whichever is appropriate.
2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for
estimating device performance. Post-route timing analysis or simulation is required to determine actual performance.
3. Data applies to macros based on the S-module. Timing parameters for sequential macros constructed from C-modules
can be obtained from the Timer utility.
4. Set-up and hold timing parameters for the Input Buffer Latch are defined with respect to the PAD and the D input.
External setup/hold timing parameters must account for delay from an external PAD signal to the G inputs. Delay from an
external PAD signal to the G input subtracts (adds) to the internal setup (hold) time.
5. Delays based on 35 pF loading.
Revision 11
1- 69