A2F500M3G-FGG484 Datasheet, PDF (50/192 Pages) Microsemi Corporation – SmartFusion Customizable System-on-Chip (cSoC)

SmartFusion DC and Switching Characteristics
Timing Characteristics
Table 2-56 • 1.5 V LVCMOS High Slew
Worst Commercial-Case Conditions: T_J = 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 1.425 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive
Strength
2m
Speed
Grade
Std.
t_DOUT
0.60
t_DP
7.79
t_DIN t_PY t_EOUT t_ZL
0.04 1.34 0.39 6.43
t_ZH
7.79
t_LZ t_HZ
3.19 2.59
t_ZLS
8.49
t_ZHS
9.85
–1
0.50 6.49 0.03 1.12 0.32 5.36 6.49 2.66 2.16 7.08 8.21
4 mA
Std. 0.60 4.95 0.04 1.34 0.39 4.61 4.96 3.53 3.19 6.67 7.02
–1
0.50 4.13 0.03 1.12 0.32 3.85 4.13 2.94 2.66 5.56 5.85
6 mA
Std. 0.60 4.36 0.04 1.34 0.39 4.34 4.36 3.60 3.34 6.40 6.42
–1
0.50 3.64 0.03 1.12 0.32 3.62 3.64 3.00 2.78 5.33 5.35
8 mA
Std. 0.60 3.89 0.04 1.34 0.39 3.96 3.34 3.72 3.92 6.02 5.40
–1
0.50 3.24 0.03 1.12 0.32 3.30 2.79 3.10 3.27 5.02 4.50
12 mA
Std. 0.60 3.89 0.04 1.34 0.39 3.96 3.34 3.72 3.92 6.02 5.40
–1
0.50 3.24 0.03 1.12 0.32 3.30 2.79 3.10 3.27 5.02 4.50
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 2-57 • 1.5 V LVCMOS Low Slew
Worst Commercial-Case Conditions: T_J = 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 1.4 V
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
Drive
Strength
2 mA
Speed
Grade
Std.
t_DOUT
0.60
t_DP t_DIN t_PY t_EOUT t_ZL
t_ZH
t_LZ t_HZ t_ZLS t_ZHS Units
11.96 0.04 1.34 0.39 12.18 11.70 3.20 2.47 14.24 13.76 ns
–1
0.50 9.96 0.03 1.12 0.32 10.15 9.75 2.67 2.06 11.86 11.46 ns
4 mA
Std. 0.60 9.51 0.04 1.34 0.39 9.68 8.76 3.54 3.07 11.74 10.82 ns
–1
0.50 7.92 0.03 1.12 0.32 8.07 7.30 2.95 2.56 9.79 9.02 ns
6 mA
Std. 0.60 8.86 0.04 1.34 0.39 9.03 8.17 3.61 3.22 11.08 10.23 ns
–1
0.50 7.39 0.03 1.12 0.32 7.52 6.81 3.01 2.68 9.24 8.52 ns
8 mA
Std. 0.60 8.44 0.04 1.34 0.39 8.60 8.18 3.73 3.78 10.66 10.24 ns
–1
0.50 7.04 0.03 1.12 0.32 7.17 6.82 3.11 3.15 8.88 8.53 ns
12 mA
Std. 0.60 8.44 0.04 1.34 0.39 8.60 8.18 3.73 3.78 10.66 10.24 ns
–1
0.50 7.04 0.03 1.12 0.32 7.17 6.82 3.11 3.15 8.88 8.53 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Table 2-58 • 1.5 V LVCMOS High Slew
Worst Commercial-Case Conditions: T_J = 85°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCxxxxIOBx = 3.0 V
Applicable to MSS I/O Banks
Drive
Strength
2 mA
Speed
Grade
Std.
t_DOUT
0.22
t_DP
3.24
t_DIN
0.09
t_PY
1.28
t_PYS
1.86
t_EOUT
0.22
t_ZL
3.30
t_ZH
3.20
t_LZ
t_HZ
2.24 2.21
–1
0.18 2.70 0.07 1.07 1.55 0.18 2.75 2.67 1.87 1.85
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.
Units
ns
ns
2-38
Revision 10