PD64001 Datasheet, PDF (4/9 Pages) Microsemi Corporation – 1-Port PoE Manager

PD64001 1-Port PoE Manager Datasheet
Preliminary
Pin Functionality______________
PIN PIN NAME
1. LOW_R_DETECT
2. CURRENT_PWM
3. AC_WAVE
4. CLASS_PWM
5. VCC
6. GND
7. LED2
8. LED1
9. HIGH_R_DETECT
10. XRESET
11. VMAIN_MEAS
12. PORT_OFF_IMEAS
13. R_DET_MEAS
14. AC_MEAS
15. AVCC
16. AGND
17. PRE_DET
18. RESERVED1
19. RMODE
20. RESERVED2
PIN TYPE PIN DESCRIPTION
Digital Output
Low level resistance
detection command
Digital Output
Current limit set PWM
output
Digital Output
AC disconnect output
wave
Digital Output
Class voltage set PWM
output
VCC
5V Digital VCC
GND
Digital ground
Digital Output LED2 output command
Digital Output LED1 output command
Digital Output
High level resistance
detection command
Digital Input
Reset command from
host
Digital Output
Vmain measurement
command
Port Off command/
Digital I/O current measurement
input
Digital I/O
Port voltage
measurement input
Digital I/O
AC disconnect
measurement input
VCC
5V Analog VCC
GND
Analog ground
Digital Output Pre detection command
Digital I/O Reserved
Digital Input
POE manager mode
setup
Digital I/O Reserved
R Mode Pin_________________
This pin is connected to a resistor voltage divider. It
allows the user to choose a combination of three
features, as specified in the following table:
R_mode
ALT ALT CA AT ^R26
Voltage
A
BP
(Ω)*
0.313 – 0.62 V
X
1.02K
0.94– 1.25 V
X
2.8K
1.563 – 1.87 V
X
X
5.23K
2.19 – 2. 5 V
X
X
8.87K
2.82– 3.1 V
X
X 14.7K
3.44 – 3.75 V
X
X 25.5K
4.06 – 4.375 V
X
X X 54.9K
4.68 – 5 V
X
XX
No
* R26 Pull-down's value depends on the actual mode, while for
all of the modes, R25 Pull-up's value is 10Kohm.
The ALT A / ALT B option is selecting between a
PSE alternative A or PSE alternative B. For
implementing a Midspan PSE use ALT B. The AT
option is IEEE802.3at- Compliant in accordance with
the IEEE802.3at/D3.0. The CAP option is pre
standard Capacitor detection mode.
General Application Description__
The circuit includes the following major interfaces
with the Host board:
Control
A Reset control signal driven by the switch circuitry
is used to reset the PoE circuit. This signal should
be optically coupled by the Host in order to maintain
the requirements for the 1500 Vrms isolation.
Power Supply Mains
The PoE system operates over a range of 44V to
57V.
This power must be isolated from the switch supply
and chassis by 1500 Vrms.
Grounds
There are several grounds used in the system:
chassis, digital and analog. The chassis ground is
connected to the switch’s chassis ground.
This ground plane should be 1500Vrms isolated
from the PoE circuitry as well as the power supply
for the PoE circuitry. The digital and analog grounds
are electrically the same ground. However, in order
to reduce noise coupling, the grounds are physically
separated and connected only at a single point.
5V Regulator
A single port application includes a 5V regulator
(Vcc) fed by the Vmain through D15, D16 zener
diodes and provides up to 25mA which is used to
power the CPU and external components in the PoE
domain.
The D15 and D16 should be selected for the
application main voltage as follows:
For 44V ≤ Vmain < 50V use 16V zener diode.
For 50V ≤ Vmain ≤ 57V use 20V zener diode.
If an adequate 5V power source is available, the 5V
regulation circuitry can be removed and the zener
diodes may be replaced by lower current (5mA)
zener diodes but with same voltage requirements.
Copyright © 2008
Rev. 0.4 2008-05-08
Microsemi
Analog Mixed Signal Group
1 Hanagar st., P.O/ Box 7220 Hod Hasharon 45421, Israel Tel: [phone] Fax: [phone]
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