DRF1301 Datasheet, PDF (3/4 Pages) Microsemi Corporation – MOSFET Push-Pull Hybrid

DRF1301
None of the inputs to U1 or U2 of the DRF1300 are isolated for direct connection to a ground referenced power supply or control circuitry.
Isolation appropriate to the application is the responsibility of the end user. It is imperative that high output currents be restricted to
the Source (14, 16, 18) and drain (15, 17) pins by design. See DRF100 for more information on Driver IC used in the device.
The Function (FN, pin 3 or pin 9) is the invert or non-invert select Pin, it is Internally held high.
Truth Table * Referenced to SG
FN (pin 3)
IN (pin 4)
MOSFET U1
HIGH
HIGH
ON
HIGH
LOW
OFF
LOW
HIGH
OFF
LOW
LOW
ON
Truth Table * Referenced to SG
FN (pin 9)
IN (pin 10)
MOSFET U2
HIGH
HIGH
ON
HIGH
LOW
OFF
LOW
HIGH
OFF
LOW
LOW
ON
Figure 2, DRF1301 Test Circuit
The test circuit illustrated in Figure 2 was used to evaluate the DRF1301 (available as an evaluation board DRF13XX/EVALSW.) The input
control signal is applied via IN and SG pins using RG188. This provides excellent noise immunity and control of the signal ground currents.
The +V_DD inputs (pins 2, 6, 8 and 12) should be heavily by-passed by 1uF capacitors as close to the pins as possible. The capacitors used
for this function must be capable of supporting the RMS currents and frequency of the gate load. A 50 Ohm (RL) load is used to evaluate the
output performance.
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