A2F500M3G-1FGG484 Datasheet, PDF (130/192 Pages) Microsemi Corporation – SmartFusion Customizable System-on-Chip (cSoC)

Pin Descriptions
Analog Front-End Pin-Level Function Multiplexing
Table 5-2 describes the relationships between the various internal signals found in the analog front-end
(AFE) and how they are multiplexed onto the external package pins. Note that, in general, only one
function is available for those pads that have numerous functions listed. The exclusion to this rule is
when a comparator is used; the ADC can still convert either input side of the comparator.
Table 5-2 • Relationships Between Signals in the Analog Front-End
ADC
Dir.-In
Current Temp.
Pin
Channel Option Prescaler Mon. Mon. Compar. LVTTL SDD MUX
SDD
ABPS0 ADC0_CH1
ABPS0_IN
ABPS1 ADC0_CH2
ABPS1_IN
ABPS2 ADC0_CH5
ABPS2_IN
ABPS3 ADC0_CH6
ABPS3_IN
ABPS4 ADC1_CH1
ABPS4_IN
ABPS5 ADC1_CH2
ABPS5_IN
ABPS6 ADC1_CH5
ABPS6_IN
ABPS7 ADC1_CH6
ABPS7_IN
ABPS8 ADC2_CH1
ABPS8_IN
ABPS9 ADC2_CH2
ABPS9_IN
ADC0 ADC0_CH9 Yes
CMP1_P LVTTL0_IN
ADC1 ADC0_CH10 Yes
CMP1_N LVTTL1_IN SDDM0_OUT
ADC2 ADC0_CH11 Yes
CMP3_P LVTTL2_IN
ADC3 ADC0_CH12 Yes
CMP3_N LVTTL3_IN SDDM1_OUT
ADC4 ADC1_CH9 Yes
CMP5_P LVTTL4_IN
ADC5 ADC1_CH10 Yes
CMP5_N LVTTL5_IN SDDM2_OUT
ADC6 ADC1_CH11 Yes
CMP7_P LVTTL6_IN
ADC7 ADC1_CH12 Yes
CMP7_N LVTTL7_IN SDDM3_OUT
ADC8 ADC2_CH9 Yes
CMP9_P LVTTL8_IN
ADC9 ADC2_CH10 Yes
CMP9_N LVTTL9_IN SDDM4_OUT
ADC10 ADC2_CH11 Yes
LVTTL10_IN
ADC11 ADC2_CH12 Yes
LVTTL11_IN
CM0 ADC0_CH3 Yes
CM0_H
CMP0_P
CM1 ADC0_CH7 Yes
CM1_H
CMP2_P
CM2 ADC1_CH3 Yes
CM2_H
CMP4_P
CM3 ADC1_CH7 Yes
CM3_H
CMP6_P
CM4 ADC2_CH3 Yes
CM4_H
CMP8_P
SDD0 ADC0_CH15
SDD0_OUT
SDD1 ADC1_CH15
SDD1_OUT
Notes:
1. ABPSx_IN: Input to active bipolar prescaler channel x.
2. CMx_H/L: Current monitor channel x, high/low side.
3. TMx_IO: Temperature monitor channel x.
4. CMPx_P/N: Comparator channel x, positive/negative input.
5. LVTTLx_IN: LVTTL I/O channel x.
6. SDDMx_OUT: Output from sigma-delta DAC MUX channel x.
7. SDDx_OUT: Direct output from sigma-delta DAC channel x.
5-16
Revision 10