A3P015-QNG68 Datasheet, PDF (112/220 Pages) Microsemi Corporation – 15 k to 1 M System Gates, Up to 144 kbits of True Dual-Port SRAM

ProASIC3 DC and Switching Characteristics
Timing Waveforms
t_CYC
RCLK
REN
RBLK
t_ENS
t_BKS
RD
(flow-through)
D_n
RD
(pipelined)
Figure 2-36 • FIFO Read
D_n
t_CYC
t_CKQ1
D₀
t_CKQ2
WCLK
WEN
WBLK
t_ENS
t_BKS
WD
DI₀
Figure 2-37 • FIFO Write
t_ENH
t_DS
t_DH
DI₁
t_ENH
t_BKH
D₁
D₂
D₀
D₁
t_BKH
2-98
Revision 13