VPX322XE Datasheet, PDF (56/92 Pages) Micronas – Video Pixel Decoders

VPX 322xE
ADVANCE INFORMATION
4.2.4. Recommended Crystal Characteristics
Symbol
Parameter
Min.
Typ.
Max.
Unit
T_A
Operating Ambient Temperature
0
f_P
Parallel Resonance Frequency
–
with Load Capacitance C_L = 13 pF
Df_P/f_P
Accuracy of Adjustment
–
Df_P/f_P
Frequency Temperature Drift
–
R_R
Series Resistance
–
C₀
Shunt Capacitance
3
C₁
Motional Capacitance
20
Load Capacitance Recommendation
C_Lext
External Load Capacitance¹⁾ from –
pins to Ground (PLCC44)
(pin names: Xtal1 Xtal2)
DCO Characteristics²⁾
–
65
20.250000
–
fundamental
–
±20
–
±30
–
25
–
7
–
30
4.7
–
°C
MHz
ppm
ppm
W
pF
fF
pF
C_ICLoadmin
Effective Load Capacitance @ min.
4.3
pF
DCO-Position, Code 0,
package: PLCC44
C_ICLoadrng
Effective Load Capacitance Range, 8.7
DCO Codes from 0..255
12.7
16.7
pF
1) _{Remarks on defining the External Load Capacitance:}
External capacitors at each crystal pin to ground are required. They are necessary to tune the effective load
capacitance of the PCBs to the required load capacitance (C_L) of the crystal. The higher the capacitors, the
lower the clock frequency results. The nominal free running frequency should match f_p = 20.25 MHz. Due to
different layouts of customer PCBs, the matching capacitor size should be determined in the application. The
suggested value is a figure based on experience with various PCB layouts.
Tuning condition: Code DVCO Register = –720
2) _{Remarks on Pulling Range of DCO:}
The pulling range of the DCO is a function of the used crystal and effective load capacitance of the IC (C_ICLoad
+ C_LoadBoard). The resulting frequency (f_L) with an effective load capacitance of C_Leff = C_ICLoad + C_LoadBoard is
1 + 0.5 * [ C₁ / (C₀ + C_L ) ]
f_L = f_P * –––––––––––––––––––––––
1 + 0.5 * [ C₁ / (C₀ + C_Leff ) ]
3) _{Remarks on DCO Codes:}
The DCO hardware register has 8 bits; the FP control register uses a range of –2048...2047.
56
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