VPX322XE Datasheet, PDF (17/92 Pages) Micronas – Video Pixel Decoders

ADVANCE INFORMATION
VPX 322xE
2.6.2. Skew Correction
The VPX delivers orthogonal pixels with a fixed clock
even in the case of non-broadcast signals with substan-
tial horizontal jitter (VCRs, laser disks, certain portions
of the 6 o’clock news...).
This is achieved by highly accurate sync slicing com-
bined with post correction. Immediately after the analog
input is sampled, a horizontal sync slicer tracks the posi-
tion of sync. This slicer evaluates, to within 1.6 ns, the
skew between the sync edge and the edge of the pixel-
clock. This value is passed as a skew on to the phase
shift filter in the resizer. The skew is then treated as a
fixed initial offset during the resizing operation.
The skew block in the resizer performs programmable
phase shifting with subpixel accuracy. In the luminance
path, a linear interpolation filter provides a phase shift
between 0 and 31/32 in steps of 1/32. This corresponds
to an accuracy of 1.6 ns. The chrominance signal can be
shifted between 0 and 7/8 in steps of 1/8.
2.6.3. Peaking and Coring
The horizontal resizer comes with an extra peaking filter
for sharpness control. The center frequency of the peak-
ing filter is automatically adjusted to the image size in
512 steps. However, for each size, the user can select
between a low, middle (default), or high center frequen-
cy for peaking. The peaking amplitude can be controlled
by the user in 8 steps via FP-RAM 0x126/130. Fig. 2–15
shows the magnitude response of the eight steps of the
peaking filter corresponding to an image size of 320 pix-
els.
After the peaking filter, an additional coring filter is imple-
mented to the horizontal resizer. The coring filter sub-
tracts 0, 1/2, 1, or 2 LSBs of the higher frequency part of
the signal. Note, that coring can be performed indepen-
dently of the peaking value adjustment.
dB
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2.6.4. YC_bC_r Color Space
The color decoder outputs luminance and one multi-
plexed chrominance signal at a sample clock of
20.25 MHz. Active video samples are flagged by a sepa-
rate reference signal. Internally, the number of active
samples is 1080 for all standards (525 lines and 625
lines). The representation of the chroma signals is the
ITU-R 601 digital studio standard.
In the color decoder, the weighting for both color differ-
ence signals is adjusted individually. The default format
has the following specification:
– Y = 224*Y + 16 (pure binary),
– Cr = 224*(0.713*(R–Y)) + 128 (offset binary),
– Cb = 224*(0.564*(B–Y)) + 128 (offset binary).
2.6.5. Video Adjustments
The VPX provides a selectable gain (contrast) and offset
(brightness) for the luminance samples, as well as addi-
tional noise shaping. Both the contrast and brightness
factors can be set externally via I²C serial control of FP-
RAM 0x127,128,131, and 132. Fig. 2–16 gives a func-
tional description of this circuit. First, a gain is applied,
yielding a 10-bit luminance value. The conversion back
to 8-bit is done using one of four selectable techniques:
simple rounding, truncation,1-bit error diffusion, or 2-bit
error diffusion. Bit[8] in the ‘contrast’-register selects be-
tween the clamping levels 16 and 32.
I_out = c * I_in + b
c = 0...63/32 in 64 steps
b = –127...128 in 256 steps
In the chrominance path, C_b and C_r samples can be
swapped with bit[8] in FP-RAM 0x126 or 130. Adjust-
ment of color saturation and gain is provided via FP-
RAM 0x30–33 (see section 2.3.5.).
0
Rounding
Truncation
–10
1 bit
Err. Diff.
–20
2 bit
Err. Diff.
–30
0
1
2
3
4
5
6
MHz
Fig. 2–15: Frequency response of peaking filter
Micronas
Contrast
Select
Brightness ^FP-RAM
Registers
Fig. 2–16: Contrast and brightness adjustment
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