MT48LC4M16A2B4-6AITJ Datasheet, PDF(79/83 Page) Micron Technology

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MT48LC4M16A2B4-6AITJ Datasheet, PDF (79/83 Pages) Micron Technology – SDR SDRAM

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64Mb: x4, x8, x16 SDRAM

SELF REFRESH Operation

Figure 49: Self Refresh Mode

CLK

tCK

tCH

tCL

tCKS

((

))

((

))

CKE

tCKS tCKH

tCMS tCMH

Command PRECHARGE

NOP

DQM

((

))

((

AUTO

))

REFRESH

((

))

((

))

((

))

Tn + 1

( ( To + 1

))

((

))

((

))

((

))

((

NOP

))

((

))

((

))

((

))

To + 2

AUTO

REFRESH

Address

A10

BA0, BA1

All banks

Single bank

tAS tAH

Bank(s)

((

))

((

))

((

))

((

))

((

))

((

))

DQ High-Z

Precharge all

active banks

((

tRP

))

Enter self refresh mode

((

))

tXSR

Exit self refresh mode

(Restart refresh time base)

CLK stable prior to exiting

self refresh mode

Donât Care

Note: 1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are

not required.

PDF: 09005aef80725c0b

64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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