MT46H32M16LFBF-6ITC Datasheet, PDF (75/96 Pages) Micron Technology – 512Mb: x16, x32 Mobile Low-Power DDR SDRAM Features

512Mb: x16, x32 Mobile LPDDR SDRAM
WRITE Operation
Figure 35: Consecutive WRITE-to-WRITE
CK#
CK
Command
T0
WRITE^{1, 2}
T1 T1n T2 T2n T3 T3n T4 T4n T5
NOP
WRITE^{1, 2}
NOP
NOP
NOP
Address
DQS
DQ³
DM
Bank,
Col b
t_{DQSS (NOM)}
Bank,
Col n
Db_IN
bD+^IN1
bD+^IN2
bD+^IN3
Dn_IN
nD+^IN1
nD+^IN2
nD+^IN3
Don’t Care
Notes:
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D_INb (n) = data-in for column b (n).
Transitioning Data
Figure 36: Nonconsecutive WRITE-to-WRITE
T0
CK#
CK
Command
WRITE^{1, 2}
T1 T1n T2 T2n T3
NOP
NOP
WRITE^1,2
T4 T4n T5 T5n
NOP
NOP
Address
DQS
DQ³
DM
Bank,
Col b
t_{DQSS (NOM)}
Bank,
Col n
Db_IN
bD+^IN1
bD+^IN2
bD+^IN3
Dn_IN
nD+^IN1
nD+^IN2
nD+^IN3
Don’t Care
Notes:
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D_INb (n) = data-in for column b (n).
Transitioning Data
PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. H 06/13 EN
75
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