M25PX64-VME6G Datasheet, PDF(32/56 Page) Micron Technology – Micron M25PX64 Serial Flash Embedded Memory

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M25PX64-VME6G Datasheet, PDF (32/56 Pages) Micron Technology – Micron M25PX64 Serial Flash Embedded Memory

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Micron M25PX64 Serial Flash Embedded Memory

DUAL INPUT FAST PROGRAM

The DUAL INPUT FAST PROGRAM command is similar to the PAGE PROGRAM com-

mand, except that data is entered on two pins (DQ0 and DQ1) instead of one, doubling

the data transfer bandwidth.

The DUAL INPUT FAST PROGRAM command is entered by driving Chip Select S# LOW,

followed by the command code, three address bytes, and at least one data byte on serial

data input (DQ0).

If the eight least significant address bits (A7-A0) are not all zero, all transmitted data that

goes beyond the end of the current page is programmed from the start address of the

same page; that is, from the address whose eight least significant bits (A7-A0) are all

zero. S# must be driven LOW for the entire duration of the sequence.

If more than 256 bytes are sent to the device, previously latched data is discarded and

the last 256 data bytes are guaranteed to be programmed correctly within the same

page. If less than 256 data bytes are sent to device, they are correctly programmed at the

requested addresses without any effect on other bytes in the same page.

For optimized timings, it is recommended to use the DUAL INPUT FAST PROGRAM

command to program all consecutive targeted bytes in a single sequence than to use

several DUAL INPUT FAST PROGRAM sequences, each containing only a few bytes.

S# must be driven HIGH after the eighth bit of the last data byte has been latched in.

Otherwise the DUAL INPUT FAST PROGRAM command is not executed.

As soon as S# is driven HIGH, the self-timed PAGE PROGRAM cycle is initiated; the cy-

cle's duration is tPP. While the DUAL INPUT FAST PROGRAM cycle is in progress, the

status register may be read to check the value of the write In progress (WIP) bit. The

WIP bit is 1 during the self-timed PAGE PROGRAM cycle, and 0 when the cycle is com-

pleted. At some unspecified time before the cycle is completed, the write enable latch

(WEL) bit is reset.

A DUAL INPUT FAST PROGRAM command is not executed if it applies to a page protec-

ted by the block protect bits BP2, BP1, and BP0.

Figure 21: DUAL INPUT FAST PROGRAM Command Sequence

DQ0

Command

MSB

LSB

A[MAX]

A[MIN]

DIN

LSB

DIN

DQ1

High-Z

Note: 1. Cx = 7 + (A[MAX] + 1).

DIN

MSB

DIN

PDF: 09005aef845665ac

m25px64.pdf - Rev. B 3/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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