M25PX64-VME6G Datasheet, PDF (29/56 Pages) Micron Technology – Micron M25PX64 Serial Flash Embedded Memory

Micron M25PX64 Serial Flash Embedded Memory
READ LOCK REGISTER
READ LOCK REGISTER
The device is first selected by driving chip select (S#) LOW. The command code for the
READ LOCK REGISTER command is followed by a 3-byte address (A23-A0) pointing to
any location inside the concerned sector. Each address bit is latched-in during the ris-
ing edge of serial clock (C). Then the value of the lock register is shifted out on serial
data output (DQ1), each bit being shifted out at a maximum frequency f_C during the
falling edge of C.
The READ LOCK REGISTER command is terminated by driving S# HIGH at any time
during data output.
Figure 18: READ LOCK REGISTER Command Sequence
0
C
DQ[0]
DQ1
Command
MSB
High-Z
7
8
LSB
A[MAX]
C_x
A[MIN]
D_OUT
MSB
D_OUT
D_OUT
D_OUT
D_OUT
D_OUT
D_OUT
LSB
D_OUT
D_OUT
Don’t Care
Note: 1. Cx = 7 + (A[MAX] + 1).
Any READ LOCK REGISTER command issued while an ERASE, PROGRAM, or WRITE
cycle is in progress is rejected without any effect on the cycle that is in progress.
Values of b1 and b0 after power-up are defined in Power-Up/Down and Supply Line De-
coupling (page 41).
Table 11: Lock Register Out
Bit
b7-b2
b1
Bit name
Reserved
Sector lock down
b0 Sector write lock
Value
Function
1 The write lock and lock-down bits cannot be changed. Once a value of 1 is writ-
ten to the lock-down bit, it cannot be cleared to a value of 0 except by a power-
up.
0 The write lock and lock-down bits can be changed by writing new values to
them.
1 WRITE, PROGRAM, and ERASE operations in this sector will not be executed. The
memory contents will not be changed.
0 WRITE, PROGRAM, or ERASE operations in this sector are executed and will
modify the sector contents.
PDF: 09005aef845665ac
m25px64.pdf - Rev. B 3/13 EN
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