MT9M001 Datasheet, PDF (28/32 Pages) Micron Technology – 1/2-Inch Megapixel CMOS Digital Image Sensor

MT9M001 - 1/2-Inch Megapixel Digital Image Sensor
Electrical Specifications
Two-wire Serial Bus Timing
The two-wire serial bus operation requires certain minimum master clock cycles
between transitions. These are specified in the following diagrams in master clock
cycles.
Figure 18: Serial Host Interface Start Condition Timing
5
4
SCLK
SDATA
Figure 19: Serial Host Interface Stop Condition Timing
5
4
SCLK
SDATA
Note: All timing are in units of master clock cycle.
Figure 20: Serial Host Interface Data Timing for Write
4
4
SCLK
SDATA
Note: SDATA is driven by an off-chip transmitter.
Figure 21: Serial Host Interface Data Timing for Read
5
SCLK
SDATA
Note:
SDATA is pulled LOW by the sensor, or allowed to be pulled HIGH by a pull-up resistor off-
chip.
80a3e031
MT9M001_DS_2.fm - Rev.C 7/05 EN
28
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