MT4LSDT464AG Datasheet, PDF (23/28 Pages) Micron Technology – SDRAM Unbuffered DIMM (UDIMM)

32MB, 64MB, 128MB (x64, SR) 168-Pin SDRAM UDIMM
Serial Presence-Detect
Figure 7: Definition of Start and Stop
SCL
SDA
START
BIT
STOP
BIT
Figure 8: Acknowledge Response from Receiver
SCL from Master
8
9
Data Output
from Transmitter
Data Output
from Receiver
Acknowledge
Table 17: EEPROM Device Select Code
The most significant bit (b7) is sent first
Memory area select code (two arrays)
Protection register select code
Device Type Identifier
b7 b6 b5 b4
1
0
1
0
0
1
1
0
Chip Enable
b3 b2 b1
SA2 SA1 SA0
SA2 SA1 SA0
RW#
b0
RW#
RW#
Table 18: EEPROM Operating Modes
Mode
Current address read
Random address read
Sequential read
Byte write
Page write
RW# Bit
1
0
1
1
0
0
W#C
VIH or VIL
VIH or VIL
VIH or VIL
VIH or VIL
VIL
VIL
Bytes
1
1
1
≥1
1
≤16
Initial Sequence
Start, device select, RW# = ‘1’
Start, device select, RW# = ‘0’, address
Restart, device select, RW# = ‘1’
Similar to current or random address read
Start, device select, RW# = ‘0’
Start, device select, RW# = ‘0’
PDF: 09005aef8078bc7c/Source: 09005aef8078bcd3
SD4C4_8_16X64AG.fm - Rev. D 1/07 EN
23
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