MT55L512L18P Datasheet, PDF (20/25 Pages) Micron Technology – 8Mb ZBT SRAM

SNOOZE MODE
SNOOZE MODE is a low-current, “power-down”
mode in which the device is deselected and current is
reduced to ISB2Z. The duration of SNOOZE MODE is
dictated by the length of time the ZZ pin is in a HIGH
state. After the device enters SNOOZE MODE, all inputs
except ZZ become disabled and all outputs go to
High-Z.
The ZZ pin is an asynchronous, active HIGH input
that causes the device to enter SNOOZE MODE. When
8Mb: 512K x 18, 256K x 32/36
PIPELINED ZBT SRAM
the ZZ pin becomes a logic HIGH, ISB2Z is guaranteed
after the time ^tZZI is met. Any READ or WRITE opera-
tion pending when the device enters SNOOZE MODE is
not guaranteed to complete successfully. Therefore,
SNOOZE MODE must not be initiated until valid pend-
ing operations are completed. Similarly, when exiting
SNOOZE MODE during ^tRZZ, only a DESELECT or
READ cycle should be given.
SNOOZE MODE ELECTRICAL CHARACTERISTICS
DESCRIPTION
Current during SNOOZE MODE
ZZ active to input ignored
ZZ inactive to input sampled
ZZ active to snooze current
ZZ inactive to exit snooze current
CONDITIONS
ZZ ≥ VIH
NOTE: 1. This parameter is sampled.
SYMBOL
ISB2Z
t_ZZ
t_RZZ
t_ZZI
t_RZZI
MIN
0
0
0
MAX UNITS
10
mA
2(^tKHKH) ns
2(^tKHKH) ns
2(^tKHKH) ns
ns
NOTES
1
1
1
1
CLK
ZZ
I _SUPPLY
ALL INPUTS
(except ZZ)
Outputs (Q)
SNOOZE MODE WAVEFORM
t _ZZ
t _ZZI
t _RZZ
I _ISB2Z
t _RZZI
DESELECT or READ Only
High-Z
DON’T CARE
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM
MT55L512L18P_C.p65 – Rev. 2/02
20
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.