MT36VDDT51272G Datasheet, PDF (11/18 Pages) Micron Technology – DDR SDRAM RDIMM

1GB, 2GB, 4GB (x72, ECC, DR) 184-Pin DDR RDIMM
Electrical Specifications
IDD Specifications
Table 10:
IDD Specifications and Conditions – 1GB
Values are for the MT46V64M4 DDR SDRAM only and are computed from values specified in the
256Mb (64 Meg x 4) component data sheet
Parameter/Condition
Operating one bank active-precharge current: ^tRC = ^tRC (MIN);
t_{CK =} t_{CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;}
Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t_{RC =} t_{RC (MIN);} t_{CK =} t_{CK (MIN); IOUT = 0mA; Address and control inputs}
changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode; ^tCK = ^tCK (MIN); CKE = LOW
Idle standby current: CS# = HIGH; All device banks idle; ^tCK = ^tCK (MIN);
CKE = HIGH; Address and other control inputs changing once per clock cycle;
VIN = VREF for DQ, DM, and DQS
Active power-down standby current: One device bank active; Power-
down mode; ^tCK = ^tCK (MIN); CKE = LOW
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t_{RC =} t_{RAS (MAX);} t_{CK =} t_{CK (MIN); DQ, DM, and DQS inputs changing twice}
per clock cycle; Address and other control inputs changing once per clock
cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock
cycle; ^tCK = ^tCK (MIN); IOUT = 0mA
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle; ^tCK = ^tCK (MIN); DQ, DM, and DQS inputs changing twice per clock
cycle
Auto refresh current
t_{REFC =} t_{RFC (MIN)}
t_{REFC = 15.625µs}
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving
reads (BL = 4) with auto precharge; ^tRC = ^tRC (MIN); ^tCK = ^tCK (MIN);
Address and control inputs change only during active READ or WRITE
commands
Symbol
IDD0¹
IDD1¹
IDD2P²
IDD2F²
IDD3P²
IDD3N²
IDD4R²
IDD4W²
IDD5²
IDD5A²
IDD6²
IDD7¹
-335
2,322
3,132
144
1,800
1,080
2,160
3,222
3,222
9,180
216
144
7,452
-26A
2,232
2,682
144
1,620
900
1,800
2,772
2,772
8,460
216
144
6,372
-265 Units
2,232 mA
2,682 mA
144 mA
1,620 mA
1,080 mA
1,800 mA
2,772 mA
2,772 mA
8,820 mA
216 mA
144 mA
6,642 mA
Notes:
1. Value calculated as one module rank in this operating condition; all other module ranks in
IDD2P (CKE LOW) mode.
2. Value calculated reflects all module ranks in this operating condition.
PDF: 09005aef809d5451/Source: 09005aef807da325
dd36c128_256_512x72.fm - Rev. F 6/08 EN
11
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