MT28F1284W18 Datasheet, PDF (1/66 Pages) Micron Technology – 1.8V Low Voltage, Extended Temperature

FLASH MEMORY
8 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
MT28F1284W18
1.8V Low Voltage, Extended Temperature
Features
Dedicated commands to decrease programming times for
both in-factory and in-system operations
Fast programming algorithm (FPA) for fast PROGRAM
operation
16-word page
Flexible 8Mb multipartition architecture
Single word (16-bit) data bus
Support for true concurrent operation with zero latency
Basic configuration:
• 135 individually programmable/erasable blocks
• 16 partitions (8Mb each for code and data storage)
Operating Voltage
• VCC = 1.70V (MIN)–1.95V (MAX)
• VCCQ = 1.70V (MIN)–2.24V (MAX)
VPP = 1.8V (TYP) for in-system PROGRAM/ERASE
• 12V ±5% (HV) VPP tolerant (factory programming
compatibility)
Random access time: 60ns @ 1.70V VCC
Burst mode read access
• MAX clock rate: 66 MHz (^tCLK = 15ns)
• MAX clock rate: 54 MHz (^tCLK = 18.5ns)
• Burst latency 60ns @1.70V VCC and 66 MHz
• 4 word, 8 word, 16 word, and continuous burst modes
• ^tACLK: 14ns @ 1.70V VCC and 54 MHz
• ^tACLK: 11ns @ 1.70V VCC and 66 MHz
Page mode read access
• Interpage read access: 60ns @ 1.70V VCC
• Intrapage read access: 15ns @ 1.70V VCC
Low power consumption (VCC = 1.95V)
• Burst read @ 66 MHz <10mA (TYP)
• Standby < 50µA(TYP)
• Automatic power save (APS)
Enhanced program and erase suspend options
• ERASE-SUSPEND-to-READ within same partition
• PROGRAM-SUSPEND-to-READ within same
partition
• ERASE-SUSPEND-to-PROGRAM within same
partition
Dual 64-bit chip protection registers for security purposes
Cross-compatible command support
• Extended command set
• Common flash interface
Programmable WAIT# configuration
Clock suspend
100,000 ERASE cycles per block
Figure 1: 56-Ball VFBGA
1
2
3
4
5
6
7
8
A
A11
A8
VSS
VCC
VPP
A18
A6
A4
B
A12
A9
A20 CLK
RST# A17
A5
A3
C
A13 A10 A21 ADV# WE# A19
A7
A2
D
A15 A14 WAIT# A16 DQ12 WP# A22
A1
E
VCCQ DQ15 DQ6 DQ4 DQ2 DQ1 CE#
A0
F
VSS DQ14 DQ13 DQ11 DQ10 DQ9 DQ0 OE#
G
DQ7 VSSQ DQ5 VCC
DQ3 VCCQ DQ8 VSSQ
Top View
NOTE:
1. See Table 3 for ball descriptions.
2. See Figure 35 for mechanical drawing.
Options
Marking
Timing
• 60ns access
-60
• 70ns access
-70
Burst Frequency
• 54 MHz
5
• 66 MHz¹
6
Boot Block Configuration
• Top
T
• Bottom
B
Package
• 56-ball VFBGA (Standard) 7 x 8 ball
FQ
grid
• 56-ball VGBGA (Lead-free) 7 x 8 ball
BQ
grid²
Operating Temperature Range
• Extended (-40ºC to +85ºC)
ET
NOTES: 1. Contact factory for availability.
2. Contact factory for details.
Part Number Example:
MT28F1284W18FQ-705 TET
09005aef80b425b4
MT28F1284W18_D.fm - Rev. D, 11/03 EN
1
©2003 Micron Technology, Inc. All rights reserved.
‡_{PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY}
MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.