KSZ8794CNX Datasheet, PDF (97/124 Pages) Microchip Technology – Integrated 4-Port 10/100 Managed Ethernet Switch with Gigabit RGMII/MII/RMII Interface

KSZ8794CNX
TABLE 4-25: EEE PORT REGISTERS (CONTINUED)
Address
Name Description
Mode
Default
EEE Port Register 5
Port EEE Control Register
Reg. 110 (0x6E) Bits[7:5] = 001 for EEE, Reg. 110 Bits[3:0] = 0xn, n = 1-3 for the Indirect Port Register,
Reg. 111 (0x6F) Bits[7:0] = Offset to access the Indirect Byte Register 0xA0.
Offset: 0x2C (Bits[15:8]), 0x2D (bits[7:0])
Location: (001 EEE) -> {0xn, offset} -> 0xA0 holds the data.
15
10BT EEE 1 = 10BT EEE mode is disabled
R/W
1
Disable 0 = 10BT EEE mode is enabled
Note: 10BT EEE mode save power by reducing
signal amplitude only.
14 - 8
Reserved —
RO
7h’0
7
H/W Based 1 = H/W will automatically perform EEE capability
R/W
1
EEE NP exchange with Link Partner through next page
Auto-Negoti- exchange. EEE 100BT enable (Bit[0] of this regis-
ation Enable ter). Will be set by H/W if EEE capability is
matched.
0 = H/W-based EEE capability exchange is off.
EEE capability exchange is done by software.
6
H/W 100BT 1 = 100BT EEE is enabled by H/W-based np
R
0
EEE Enable exchange
Status 0 = 100BT EEE is disabled
5
TX LPI 1 = Indicates that the transmit PCS has received
R/RC
0
Received low power idle signaling one or more times since
the register was last read.
0 = Indicates that the PCS has not received low
power idle signaling.
This bit is cleared after reading.
4
TX LPI 1 = Indicates that the transmit PCS is currently
R
0
Indication receiving low power idle signals.
0 = Indicates that the PCS is not currently receiving
low power idle signals.
3
RX LPI 1 = Indicates that the receive PCS has received
R/RC
0
Received low power idle signaling one or more times since
the register was last read.
0 = Indicates that the PCS has not received low
power idle signaling.
This bit is cleared after reading.
2
RX LPI 1 = Indicates that the receive PCS is currently
R
0
Indication receiving low power idle signals.
0 = Indicates that the PCS is not currently receiving
low power idle signals.
1
EEE SW 1 = EEE is enabled through S/W setting Bit[0] of
R/W
0
Mode Enable this register.
0 = EEE is enabled through H/W Auto-Negotiation
0
EEE SW 1 = EEE 100BT is enabled
R/W
0
100BT 0 = EEE 100BT is disabled
Enable
Note: This bit could be set by S/W or H/W if H/W-
based EEE Next Page Auto-Negotiation enable is
on.
 2016 Microchip Technology Inc.
DS00002134A-page 97