KSZ8794CNX Datasheet, PDF (10/124 Pages) Microchip Technology – Integrated 4-Port 10/100 Managed Ethernet Switch with Gigabit RGMII/MII/RMII Interface

KSZ8794CNX
TABLE 2-1: SIGNALS - KSZ8794CNX (CONTINUED)
Pin
Number
Pin
Name
Type
Note 2-1
Port
Description
52
SPIQ
Ipd/O
All SPI Serial Data Output in SPI Slave Mode
Strap Option: Serial Bus Configuration
PD = SPI slave mode.
PU = MDC/MDIO mode.
Note: An external pull-up or pull-down resistor is required.
53
SCL_MDC
Ipu
All Clock for SPI or MDC/MDIO Interfaces
Input clock up to 50 MHz in SPI slave mode.
Input clock up to 25 MHz in MDC/MDIO for MIIM access.
54
SDA_MDIO
Ipu/O
All Data Line for SPI or MDC/MDIO Interfaces
Serial data input in SPI slave mode.
MDC/MDIO interface input/output data line.
55
SPIS_N
Ipu
All SPI Interface Chip Select
When SPIS_N is high, the KSZ8794CNX is deselected and
SPIQ is held in the high impedance state. A high-to-low transi-
tion initiates the SPI data transfer. This pin is active-low.
56
VDDIO
P
— 3.3V, 2.5V, or 1.8V digital V_DD for digital I/O circuitry.
57
GNDD
GND
— Digital Ground.
58
RST_N
Ipu
— Reset
This active-low signal resets the hardware in the device. See
the timing requirements in the Timing Diagram Section.
59
VDD12D
P
— 1.2V Core Power.
60
VDDAT
P
— 3.3V or 2.5V Analog Power.
61
ISET
—
— Transmit Output Current Set
This pin configures the physical transmit output current.
It should be connected to GND through a 12.4 kΩ 1% resistor.
62
GNDA
GND
— Analog Ground.
63
XI
I
— Crystal Clock Input/Oscillator Input
When using a 25 MHz crystal, this input is connected to one end
of the crystal circuit. When using a 3.3V oscillator, this is the
input from the oscillator.
The crystal or oscillator should have a tolerance of ±50 ppm.
64
Note 2-1
XO
O
— Crystal Clock Output.
When using a 25 MHz crystal, this output is connected to one
end of the crystal circuit.
P = power supply; GND = ground; I = input; O = output
I/O = bi-directional
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
OTRI = Output tri-stated.
PU = Strap pin pull-up.
PD = Strap pin pull-down.
NC = No connect or tie-to-ground for this product.
DS00002134A-page 10
 2016 Microchip Technology Inc.