ENC624J600-I Datasheet, PDF (97/168 Pages) Microchip Technology – Stand-Alone 10/100 Ethernet Controller with SPI or Parallel Interface

ENC424J600/624J600
10.0 RECEIVE FILTERS
To minimize the number of frames that the host controller
must process, ENC424J600/624J600 devices incorpo-
rate 11 different receive filters to discard unwanted
frames. The following filters are available:
• CRC Error Collection Filter
• Runt Error Collection Filter
• CRC Error Rejection Filter
• Runt Error Rejection Filter
• Unicast Collection Filter
• Not-Me Unicast Collection Filter
• Multicast Collection Filter
• Broadcast Collection Filter
• Hash Table Collection Filter
• Magic Packet™ Collection Filter
• Pattern Match Collection Filter
Each filter is software configurable, and can be individu-
ally enabled or disabled, using the ERXFCON register
(Register 10-1). Each filter is either a Collection or a
Rejection filter, with incoming frames passing sequen-
tially through each enabled filter. The first filter to make a
definitive decision for a frame takes priority over all
others. Collection filters either force a frame to be
accepted or defer the decision to a lower priority filter.
Similarly, Rejection filters either discard frames or defer
to lower priority filters. Frames that pass through all filters
without specifically being accepted are discarded.
Figure 10-1 demonstrates this decision tree.
At power-up, the CRC Error Rejection, Runt Error
Rejection, Unicast Collection and Broadcast Collection
filters are enabled, and all others are disabled. With
these settings, the device will only accept Broadcast
frames and frames specifically addressed to the local
MAC address. Invalid frames and those destined for
other nodes will be automatically rejected.
Note 1: The MAC internally processes and filters
Ethernet control frames as they arrive
and before they reach these filters. For
the application to receive Ethernet control
frames, enable the PASSALL option
(MACCON1<1> = 1).
2: If the Ethernet Receive Enable bit, RXEN
(ECON1<0>), is set, the filters may make
an incorrect decision if any of the receive
filters are reconfigured at the exact
moment a new frame is being received.
To avoid this behavior, clear the RXEN bit
prior to changing any receive filter
settings.
 2010 Microchip Technology Inc.
DS39935C-page 95