TC4423_13 Datasheet, PDF (9/20 Pages) Microchip Technology – 3A Dual High-Speed Power MOSFET Drivers

TC4423/TC4424/TC4425
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE ⁽¹⁾
8-Pin PDIP
8-Pin
DFN
16-Pin
SOIC
(Wide)
Symbol
1
2
—
3
—
—
4
—
—
5
—
6
—
7
—
8
—
Note 1:
1
1
NC
No connection
2
2
IN A Input A
—
3
NC
No connection
3
4
GND Ground
—
5
GND Ground
—
6
NC
No connection
4
7
IN B Input B
—
8
NC
No connection
—
9
NC
No connection
5
10
OUT B Output B
—
11
OUT B Output B
6
12
V_DD
Supply input
—
13
V_DD
Supply input
7
14
OUT A Output A
—
15
OUT A Output A
8
16
NC
No connection
PAD
—
NC
Exposed Metal Pad
Duplicate pins must be connected for proper operation.
Description
3.1 Inputs A and B
Inputs A and B are TTL/CMOS compatible inputs that
control outputs A and B, respectively. These inputs
have 300 mV of hysteresis between the high and low
input levels, allowing them to be driven from slow rising
and falling signals, and to provide noise immunity.
3.4 Ground (GND)
Ground is the device return pin. The ground pin(s)
should have a low-impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
3.2 Outputs A and B
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 3A peaks of current
(V_DD = 18V). The low output impedance ensures the
gate of the external MOSFET will stay in the intended
state even during large transients. These outputs also
have a reverse current latch-up rating of 1.5A.
3.3 Supply Input (V_DD)
V_DD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-
impedance path for the peak currents that are to be
provided to the load.
3.5 Exposed Metal Pad
The exposed metal pad of the 6x5 DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other cop-
per plane on a printed circuit board to aid in heat
removal from the package.
 2002-2012 Microchip Technology Inc.
DS21421E-page 9