TC1070_07 Datasheet, PDF (9/20 Pages) Microchip Technology – 50mA, 100mA and 150mA Adjustable CMOS LDOs with Shutdown

TC1070/TC1071/TC1187
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
(5-Pin SOT-23)
1
2
3
4
5
Symbol
V_IN
GND
SHDN
ADJ
V_OUT
Unregulated supply input.
Ground terminal.
Shutdown control input.
Output voltage adjust terminal.
Regulated voltage output.
Description
3.1 Input Voltage Supply (V_IN)
Connect unregulated input supply to the V_IN pin. If
there is a large distance between the input supply and
the LDO regulator, some input capacitance is
necessary for proper operation. A 1 µF capacitor
connected from V_IN to ground is recommended for
most applications.
3.2 Ground (GND)
Connect the unregulated input supply ground return to
GND. Also connect the negative side of the 1 µF typical
input decoupling capacitor close to GND and the
negative side of the output capacitor C₁ to GND.
3.3 Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic high is
applied to this input. The regulator enters shutdown
when a logic low is applied to this input. During
shutdown, output voltage falls to zero and supply cur-
rent is reduced to 0.5 μA (maximum).
3.4 Output Voltage Adjust (ADJ)
Output voltage setting is programmed with a resistor
divider from V_OUT to this input. A capacitor may also be
added to this input to reduce output noise (see
Section 4.2 “Output Capacitor”).
3.5 Regulated Voltage Output (V_out)
Connect the output load to V_OUT of the LDO. Also
connect the positive side of the LDO output capacitor
as close as possible to the V_OUT pin.
© 2007 Microchip Technology Inc.
DS21353D-page 9