TC1017R-3VLTTR Datasheet, PDF (9/22 Pages) Microchip Technology – 150 mA, Tiny CMOS LDO With Shutdown

TC1017
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
5-Pin SC-70
1
2
3
4
5
Pin No.
5-Pin SOT-23
5-Pin SC-70R
3
4
2
5
1
Symbol
SHDN
NC
GND
V_OUT
V_IN
Description
Shutdown Control Input
No Connect
Ground Terminal
Regulated Voltage Output
Unregulated Supply Input
3.1 Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to this input. During shutdown, the
output voltage falls to zero and the supply current is
reduced to 0.05 µA (typ.)
3.2 Ground Terminal
For best performance, it is recommended that the
ground pin be tied to a ground plane.
3.3 Regulated Voltage Output (V_OUT)
Bypass the regulated voltage output to GND with a
minimum capacitance of 1 µF. A ceramic bypass
capacitor is recommended for best performance.
3.4 Unregulated Supply Input (V_IN)
The minimum V_IN has to meet two conditions in order
to ensure that the output maintains regulation:
V_IN ≥ 2.7V and V_IN ≥ [(V_R + 2.5%) + V_DROPOUT]. The
maximum V_IN should be less than or equal to 6V.
Power dissipation may limit V_IN to a lower potential in
order to maintain a junction temperature below 125°C.
Refer to Section 5.0 “Thermal Considerations”, for
determining junction temperature.
It is recommended that V_IN be bypassed to GND with a
ceramic capacitor.
© 2005 Microchip Technology Inc.
DS21813D-page 9