TC1017R-3VLTTR Datasheet, PDF (14/22 Pages) Microchip Technology – 150 mA, Tiny CMOS LDO With Shutdown

TC1017
700
600
500
400
300
200
100
0
-40
-15
10
35
60
85
110
Ambient Temperature (°C)
FIGURE 5-3:
Power Dissipation vs.
Ambient Temperature (SOT-23 Package).
160
140
120
V_IN - V_OUT = 1V
100
80
60
40
20
0
-40
-15
10
35
60
85
110
Ambient Temperature (°C)
FIGURE 5-4:
Maximum Current vs.
Ambient Temperature (SOT-23 Package).
5.4 Layout Considerations
The primary path for heat conduction out of the SC-70/
SOT-23 package is through the package leads. Using
heavy wide traces at the pads of the device will facili-
tate the removal of the heat within the package, thus
lowering the thermal resistance Rθ_JA. By lowering the
thermal resistance, the maximum internal power dissi-
pation capability of the package is increased.
V_IN
C₁
SHDN
U1
V_OUT
C₂
FIGURE 5-5:
Layout.
GND
SC-70 Package Suggested
DS21813D-page 14
© 2005 Microchip Technology Inc.