PL611S-02 Datasheet, PDF (7/20 Pages) PhaseLink Corporation – 1.8V-3.3V PicoPLLTM, World’s Smallest Programmable Clock

PL611S-02
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Name
Pin Assignment
SOT-23
DFN
Type
Description
OE, PDB,
FSEL,
1
CLK1
This programmable I/O pin can be configured as an Output
Enable (OE) input, Power Down input (PDB), On-the-Fly
Frequency Switching Selector (FSEL), or CLK1 clock output
This pin has an internal 60 kΩ pull up resistor for OE, PDB, and
FSEL.
2
I/O
State
OE
PDB
FSEL
GND
2
XIN, FIN
3
XOUT
4
VDD
5
CLK0
6
0
Tri-State CLK
Power Down
Mode
Bank 1
1 (default) Normal Mode Normal Mode
Bank 2
3
P
GND connection
1
I
Crystal or Reference Clock input pin
6
O
Crystal Output pin. Do Not Connect (DNC) when F_IN is present.
5
P
V_DD connection
4
O
Programmable Clock Output
TABLE 2-2: KEY PROGRAMMING PARAMETERS
CLK[0:1]
Output Frequency
Output Drive Strength
F_OUT = F_REF × M / (R × P)
Where:
M = 11 bit
R = 8 bit
P = 5 bit
Three optional drive strengths to
choose from:
• Low: 4 mA
• Std: 8 mA (default)
• High: 16 mA
CLK0 = F_OUT, F_REF or F_REF/(2×P)
CLK1 = F_REF, F_REF/2, CLK0 or
CLK0/2
Programmable
Input/Output
One output pin can be configured as:
• OE - input
• PDB - input
• FSEL - input
• CLK1 - output
 2016 Microchip Technology Inc.
DS20005670A-page 7