24C01C Datasheet, PDF (7/12 Pages) Microchip Technology – 1K 5.0V I 2 C ™ Serial EEPROM

24C01C
6.0 WRITE OPERATIONS
6.1 Byte Write
Following the start signal from the master, the device
code(4 bits), the chip select bits (3 bits), and the R/W
bit which is a logic low is placed onto the bus by the
master transmitter. The device will acknowledge this
control byte during the ninth clock pulse. The next byte
transmitted by the master is the word address and will
be written into the address pointer of the 24C01C. After
receiving another acknowledge signal from the
24C01C the master device will transmit the data word
to be written into the addressed memory location. The
24C01C acknowledges again and the master gener-
ates a stop condition. This initiates the internal write
cycle, and during this time the 24C01C will not generate
acknowledge signals (Figure 6-1).
6.2 Page Write
The write control byte, word address and the first data
byte are transmitted to the 24C01C in the same way as
in a byte write. But instead of generating a stop condi-
tion, the master transmits up to 15 additional data bytes
to the 24C01C which are temporarily stored in the on-
chip page buffer and will be written into the memory
after the master has transmitted a stop condition. After
the receipt of each word, the four lower order address
pointer bits are internally incremented by one. The
higher order four bits of the word address remains con-
stant. If the master should transmit more than 16 bytes
prior to generating the stop condition, the address
counter will roll over and the previously received data
will be overwritten. As with the byte write operation,
once the stop condition is received an internal write
cycle will begin (Figure 6-2).
FIGURE 6-1:
BUS ACTIVITY
MASTER
SDA LINE
BYTE WRITE
S
T
A
R
CONTROL
BYTE
T
S
WORD
ADDRESS
A
BUS ACTIVITY
C
K
FIGURE 6-2:
BUS ACTIVITY
MASTER
SDA LINE
PAGE WRITE
S
T
A _CONTROL
R
BYTE
T
S
BUS ACTIVITY
WORD
ADDRESS (n)
A
A
C
C
K
K
DATA n
S
DATA
T
O
P
P
A
A
C
C
K
K
DATA n +1
A
A
C
C
K
K
S
T
DATA n + 15
O
P
P
A
C
K
© 1997 Microchip Technology Inc.
Preliminary
DS21201A-page 7