24C01C Datasheet, PDF (4/12 Pages) Microchip Technology – 1K 5.0V I 2 C ™ Serial EEPROM

24C01C
2.0 PIN DESCRIPTIONS
2.1 SDA Serial Data
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are reserved
for indicating the START and STOP conditions.
2.2 SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3 A0, A1, A2
The levels on these inputs are compared with the cor-
responding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24C01C devices may be connected to the
same bus by using different chip select bit combina-
tions. These inputs must be connected to either VCC or
VSS.
2.4 Test
This pin is utilized for testing purposes only. It may be
tied high, tied low or left floating.
2.5 Noise Protection
The 24C01C employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 3.8 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
3.0 FUNCTIONAL DESCRIPTION
The 24C01C supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, and a device
receiving data as receiver. The bus has to be controlled
by a master device which generates the serial clock
(SCL), controls the bus access, and generates the
START and STOP conditions, while the 24C01C works
as slave. Both master and slave can operate as trans-
mitter or receiver but the master device determines
which mode is activated.
DS21201A-page 4
Preliminary
© 1997 Microchip Technology Inc.