TC1025 Datasheet, PDF (6/16 Pages) TelCom Semiconductor, Inc – LINEAR BUILDING BLOCK - DUAL LOW POWER COMPARATOR

TC1025
The frequency stability of this circuit should only be a
function of the external component tolerances.
Figure 4-5 shows the circuit for a pulse width modulator
circuit. It is essentially the same as in Figure 4-4, but
with the addition of an input control voltage. When the
input control voltage is equal to one-half V_DD, operation
is basically the same as described for the free-running
oscillator. If the input control voltage is moved above or
below one-half V_DD, the duty cycle of the output square
wave will be altered. This is because the addition of the
control voltage at the input has now altered the trip
points. The equations for these trip points are shown in
Figure 4-5 (see V_H and V_L). Pulse width sensitivity to
the input voltage variations can be increased by
reducing the value of R6 from 10kΩ and conversely,
sensitivity will be reduced by increasing the value of
R6. The values of R1 and C1 can be varied to produce
the desired center frequency.
FIGURE 4-1:
TC1025
R_A
V_SRC
R_B
COMPARATOR
EXTERNAL HYSTERESIS
CONFIGURATION
R_C
V_DD
+
–
1/2
V_OUT
V_R
FIGURE 4-2:
V_DD
32.768 kHz “TIME OF
DAY” CLOCK
OSCILLATOR
32.768kHz
RA
150k
RB
150k
V_DD
1/2
+
_
R_C
CA
1M
100pF
TC1025
V_OUT
V_per = 30.52µsec
FIGURE 4-3:
NON-RETRIGGERABLE MULTIVIBRATOR
V_DD
TC1025
R3
1M
R4
1M
IN
IN
t₀
R1
A
100k
R2
100k _B
GND
–
CMPTR1
+
R10
61.9k
R5
10M
D1
R6
562k
C
C1
100pF
R9
243k
TC1025
–
CMPTR2
+
R8
10M
D2
R7
1M
OUT
OUT
C
V_DD
GND
V_DD
GND
DS21656C-page 6
© 2005 Microchip Technology Inc.