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MCP4728 Datasheet, PDF (6/66 Pages) Microchip Technology – 12-Bit, Quad Digital-to-Analog Converter with EEPROM Memory
MCP4728
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at VDD = + 2.7V to 5.5V, VSS = 0V,
RL = 5 kΩ, CL = 100 pF, GX = 1, TA = -40°C to +125°C. Typical values are at +25°C, VIH = VDD, VIL = VSS.
Parameter
Symbol Min Typical Max Units
Conditions
DAC-to-DAC Crosstalk
Digital Interface
Output Low Voltage
Schmitt Trigger
Low Input
Threshold Voltage
Schmitt Trigger
High Input
Threshold Voltage
Input Leakage
Pin Capacitance
EEPROM
EEPROM Write Time
Data Retention
—
<10
—
nV-s
VOL
—
—
0.4
V IOL = 3 mA
SDA and RDY/BSY pins
VIL
—
—
0.3VDD
V VDD > 2.7V.
SDA, SCL, LDAC pins
—
—
0.2VDD
V VDD ≤ 2.7V.
SDA, SCL, LDAC pins
VIH
0.7VDD
—
—
V SDA, SCL, LDAC pins
ILI
—
—
±1
µA SCL = SDA = LDAC = VDD,
SCL = SDA = LDAC = VSS
CPIN
—
—
3
pF (Note 4)
TWRITE
—
25
50
ms EEPROM write time
—
200
—
Years At +25°C, (Note 3)
LDAC Input
LDAC Low Time
TLDAC
210
—
—
ns Updates analog outputs (Note 3)
Note 1: All digital input pins (SDA, SCL, LDAC) are tied to “High”, Output pins are unloaded, code = 0x000.
2: The power-up ramp rate measures the rise of VDD over time.
3: This parameter is ensured by design and not 100% tested.
4: This parameter is ensured by characterization and not 100% tested.
5: Test code range: 100 - 4000 codes, VREF = VDD, VDD = 5.5V.
6: Time delay to settle to a new reference when switching from external to internal reference or vice versa.
7: This parameter is indirectly tested by Offset and Gain error testing.
8: Within 1/2 LSB of the final value when code changes from 1/4 of to 3/4 of full scale.
9: This time delay is measured from the falling edge of ACK pulse in I2C command to the beginning of VOUT.
This time delay is not included in the output settling time specification.
DS22187C-page 6
© 2009 Microchip Technology Inc.