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MCP4728 Datasheet, PDF (25/66 Pages) Microchip Technology – 12-Bit, Quad Digital-to-Analog Converter with EEPROM Memory
MCP4728
TABLE 4-3: CONFIGURATION BITS
Bit Name
Functions
RDY/BSY
(A2, A1, A0)
VREF
DAC1, DAC0
PD1, PD0
GX
UDAC
This is a status indicator (flag) of EEPROM programming activity:
1 = EEPROM is not in programming mode
0 = EEPROM is in programming mode
Note: RDY/BSY status can also be monitored at the RDY/BSY pin.
Device I2C address bits. See Section 5.3 “MCP4728 Device Addressing” for more details.
Voltage Reference Selection bit:
0 = VDD
1 = Internal voltage reference (2.048V)
Note: Internal voltage reference circuit is turned off if all channels select external reference
(VREF = VDD).
DAC Channel Selection bits:
00 = Channel A
01 = Channel B
10 = Channel C
11 = Channel D
Power-Down selection bits:
00 = Normal Mode
01 = VOUT is loaded with 1 kΩ resistor to ground. Most of the channel circuits are powered off.
10 = VOUT is loaded with 100 kΩ resistor to ground. Most of the channel circuits are powered
off.
11 = VOUT is loaded with 500 kΩ resistor to ground. Most of the channel circuits are powered
off.
Note: See Table 4-7 and Figure 4-1 for more details.
Gain selection bit:
0 = x1 (gain of 1)
1 = x2 (gain of 2)
Note: Applicable only when internal VREF is selected. If VREF = VDD, the device uses a gain of
1 regardless of the gain selection bit setting.
DAC latch bit. Upload the selected DAC input register to its output register (VOUT):
0 = Upload. Output (VOUT) is updated.
1 = Do not upload.
Note: UDAC bit affects the selected channel only.
© 2009 Microchip Technology Inc.
DS22187C-page 25