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24AA08H_13 Datasheet, PDF (6/32 Pages) Microchip Technology – 8K I2C™ Serial EEPROM with Half-Array Write-Protect | |||
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24AA08H/24LC08BH
3.6 Device Addressing
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The control byte consists of a four-bit control code. For
the 24XX08H, this is set as â1010â binary for read and
write operations. The next three bits of the control byte
are the block-select bits (B2, B1, B0). B2 is a âdonât
careâ for the 24XX08H. They are used by the master
device to select which of the four 256 word-blocks of
memory are to be accessed. These bits are in effect the
three Most Significant bits of the word address.
The last bit of the control byte defines the operation to
be performed. When set to â1â a read operation is
selected. When set to â0â a write operation is selected.
Following the Start condition, the 24XX08H monitors
the SDA bus, checking the device type identifier being
transmitted and, upon receiving a â1010â code, the
slave device outputs an Acknowledge signal on the
SDA line. Depending on the state of the R/W bit, the
24XX08H will select a read or write operation.
Operation
Read
Write
Control
Code
1010
1010
Block Select R/W
Block Address
1
Block Address
0
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
Control Code
Read/Write Bit
Block
Select
Bits
S 1 0 1 0 x B1 B0 R/W ACK
Slave Address
Start Bit
x = âdonât careâ
Acknowledge Bit
DS20002084B-page 6
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