MCP47A1T-A0E-LT Datasheet, PDF (52/70 Pages) Microchip Technology – 6-Bit Volatile DAC with Command Code

MCP47A1
8.6 Design Considerations
8.6.1
POWER SUPPLY
CONSIDERATIONS (NOISE)
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially masking the MCP47A1’s performance.
Careful board layout minimizes these effects and
increases the Signal-to-Noise Ratio (SNR). Multi-layer
boards utilizing a low-inductance ground plane,
isolated inputs, isolated outputs and proper decoupling
are suggested. Particularly harsh environments may
require shielding of critical signals.
The device’s power sources (V_DD and V_REF) should be
as clean as possible. Any noise induced on the V_DD
and V_REF signals can affect the DAC performance.
Separate digital and analog ground planes are
recommended.
Typical applications require a bypass capacitor in order
to filter high-frequency noise on the V_DD and V_REF sig-
nals. The noise can be induced onto the power supply’s
traces or as a result of changes on the DAC output. The
bypass capacitor helps to minimize the effect of these
noise sources on signal integrity. Figure 8-8 illustrates
an appropriate bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 µF. This capacitor should be placed as
close to the device power pin (V_DD) as possible (within
4 mm).
Separate digital and analog ground planes are
recommended. In this case, the V_SS pin and the ground
pins of the V_DD capacitors should be terminated to the
analog ground plane and V_DD and V_SS should reside
on the analog plane.
Figure 8-9 shows an example of using two bypass
capacitors (a 10 µF tantalum capacitor and a 0.1 µF
ceramic capacitor) in parallel on the V_DD line. These
capacitors should be placed as close to the V_DD pin as
possible (within 4 mm). If the application circuit has
separate digital and analog power supplies, the V_DD
and V_SS pins of the device should reside on the analog
plane.
Note: Breadboards and wire-wrapped boards
are not recommended.
V_DD
0.1 µF
V_DD
0.1 µF
V_REF
V_OUT
SCL
SDA
FIGURE 8-8:
Connections.
V_SS
V_SS
Typical Microcontroller
C1 C2
V_DD 1
V_SS ²
SCL 3
Optional _VREF
Analog
Optional
C4 C5
Output
6 V_REF
5 _VOUT
4 _SDA
C3
V_DD
R1
R2
To MCU
R1 and R2 are I²C pull-up resistors:
R1 and R2:
5 k - 10 k for f_SCL = 100 kHz to 400 kHz
C1: 0.1 µF capacitor
Ceramic
C2: 10 µF capacitor
Tantalum
C3: ~ 0.1 µF
C4: 0.1 µF capacitor
Optional to reduce noise
in V_OUT pin.
Ceramic
C5: 10 µF capacitor
Tantalum
FIGURE 8-9:
Example MCP47A1 Circuit.
DS25154A-page 52
 2012 Microchip Technology Inc.