TC2054 Datasheet, PDF (5/16 Pages) Microchip Technology – 50mA, 100mA, and 150mA CMOS LDOs with Shutdown and Error Output

4.0 THERMAL CONSIDERATIONS
4.1 Power Dissipation
The amount of power the regulator dissipates is prima-
rily a function of input and output voltage, and output
current.
The following equation is used to calculate worst case
power dissipation:
EQUATION 4-1:
P_D ≈ (V_IN – V_OUTMIN)I_LOADMAX
Where:
P_D
=
V_INMAX =
V_OUTMIN =
I_LOADMAX =
Worst case actual power dissipation
Maximum voltage on V_IN
Minimum regulator output voltage
Maximum output (load) current
The maximum allowable power dissipation (Equation
4-2) is a function of the maximum ambient temperature
(T_{AMAX), the maximum allowable die temperature (125}
°C) and the thermal resistance from junction-to-air
(θ_JA). The 5-Pin SOT-23A package has a θ_JA of
approximately 220°C/Watt when mounted on a typical
two layer FR4 dielectric copper clad PC board.
EQUATION 4-2:
P_DMAX
=
T_{----J---M---A--X----}–_-----T_{----A---M---A--X-}
θ_JA
Where all terms are previously defined
TC2054/2055/2186
Equation 4-1 can be used in conjunction with Equation
4-2 to ensure regulator thermal operation is within lim-
its. For example:
Given:
V_INMAX = 3.0V ±5%
V_OUTMIN = 2.7V – 2.5%
I_LOADMAX = 40mA
T_AMAX = 55°C
Find 1. Actual power dissapation
:
2. Maximum allowable dissapation
Actual power dissipation:
P_D
≈ (V_INMAX – V_OUTMIN)I_LOADMAX
= [(3.0 x 1.05) – (2.7 x .975)]40 x 10^–3
= 20.7mW
Maximum allowable power dissipation:
P_DMAX
=
(_---T_{---J---M---A--X----}–_----T_{----A---M---A--X--})_-
θ_JA
(_{---1---2---5-----}–_{-----5---5----})
220
= 318mW
In this example, the TC2054 dissipates a maximum of
only 20.7mW; far below the allowable limit of 318mW.
In a similar manner, Equation 4-1 and Equation 4-2 can
be used to calculate maximum current and/or input
voltage limits.
4.2 Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower θ_JA and, therefore,
increase the maximum allowable power dissipation
limit.
© 2002 Microchip Technology Inc.
DS21663B-page 5