KSZ8061MNX Datasheet, PDF (48/64 Pages) Microchip Technology – 10BASE-T/100 BASE-TX Physical Layer Transceiver

KSZ8061MNX/MNG
7.0 TIMING DIAGRAMS
FIGURE 7-1:
MII TRANSMIT TIMING (10BASE-T)
TABLE 7-1: MII TRANSMIT TIMING (10BASE-T) PARAMETERS
Timing
Parameter
t_P
t_WL
t_WH
t_SU1
t_SU2
t_HD1
t_HD2
t_CRS1
t_CRS2
Description
TXC period
TXC pulse width low
TXC pulse width high
TXD[3:0] setup to rising edge of TXC
TXEN setup to rising edge of TXC
TXD[3:0] hold from rising edge of TXC
TXEN hold from rising edge of TXC
TXEN high to CRS asserted latency
TXEN low to CRS de-asserted latency
Min.
—
—
—
120
120
0
0
—
—
Typ.
400
200
200
—
—
—
—
600
1.0
Max.
—
—
—
—
—
—
—
—
—
Units
ns
µs
DS00002038A-page 48
 2016 Microchip Technology Inc.