DSPIC33FJ256GP710A-I Datasheet, PDF (47/362 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog

TABLE 4-1: CPU CORE REGISTERS MAP (CONTINUED)
SFR Name
SFR
Addr
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6 Bit 5
XBREV
0050
BREN
DISICNT
0052
—
—
BSRAM
0750
—
—
—
—
—
—
—
XB<14:0>
Disable Interrupts Counter Register
—
—
—
—
SSRAM
0752
—
—
—
—
—
—
—
—
—
—
—
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 4
—
—
Bit 3
—
—
Bit 2
IW_BSR
IW_SSR
Bit 1
Bit 0
IR_BSR RL_BSR
IR_SSR RL_SSR
All
Resets
xxxx
xxxx
0000
0000