DSPIC33FJ256GP710A-I Datasheet, PDF (170/362 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog

dsPIC33FJXXXGPX06A/X08A/X10A
FIGURE 13-1:
TIMER2/3 (32-BIT) BLOCK DIAGRAM⁽¹⁾
T2CK
TGATE
Gate
Sync
TCY
1
Set T3IF
0
QD
Q CK
PR3
PR2
ADC Event Trigger⁽²⁾ _Equal
Comparator
MSb
LSb
Reset
TMR3
16
Read TMR2
Write TMR2
16
TMR3HLD
TMR2
16
16
Data Bus<15:0>
TON
1x
01
TCKPS<1:0>
2
Prescaler
1, 8, 64, 256
00
TGATE
TCS
Sync
Note 1:
2:
The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective
to the T2CON register.
The ADC event trigger is available only on Timer2/3.
DS70593D-page 170
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