PIC18F86J90-I Datasheet, PDF (416/450 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F87J90 FAMILY
FIGURE 28-9:
SCK
(CKP = 0)
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
70
78
SCK
(CKP = 1)
SDO
80
MSb
79
bit 6 - - - - - - 1
75, 76
SDI
MSb In
bit 6 - - - - 1
74
73
Note: Refer to Figure 28-3 for load conditions.
79
78
LSb
LSb In
TABLE 28-14: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
73
TDIV2SCH, Setup Time of SDI Data Input to SCK Edge
TDIV2SCL
20
—
73A TB2B
Last Clock Edge of Byte 1 to the 1st Clock Edge 1.5 TCY + 40 —
of Byte 2
74
TSCH2DIL, Hold Time of SDI Data Input to SCK Edge
TSCL2DIL
40
—
75
TDOR
SDO Data Output Rise Time
—
25
76
TDOF
SDO Data Output Fall Time
—
25
78
TSCR
SCK Output Rise Time (Master mode)
—
25
79
TSCF
SCK Output Fall Time (Master mode)
—
25
80
TSCH2DOV, SDO Data Output Valid after SCK Edge
TSCL2DOV
—
50
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns (Note 2)
ns
ns
ns
ns
ns
ns
DS39933D-page 416
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