KSZ8081MLX Datasheet, PDF (41/56 Pages) Microchip Technology – 10BASE-T/100BASE-TX Physical Layer Transceiver

7.4 MII Transmit Timing (100BASE-TX)
FIGURE 7-4:
MII TRANSMIT TIMING (100BASE-TX)
KSZ8081MLX
TXC
TXEN
TXD[3:0]
CRS
t_SU2
t_HD2
t_SU1
t_HD1
DATA
IN
t_CRS1
t_WL
t_WH
t_P
t_CRS2
TABLE 7-4: MII TRANSMIT TIMING (100BASE-TX) PARAMETERS
Parameter
t_P
t_WL
t_WH
t_SU1
t_SU2
t_HD1
t_HD2
t_CRS1
t_CRS2
Description
TXC period
TXC pulse width low
TXC pulse width high
TXD[3:0] setup to rising edge of TXC
TXEN setup to rising edge of TXC
TXD[3:0] hold from rising edge of TXC
TXEN hold from rising edge of TXC
TXEN high to CRS asserted latency
TXEN low to CRS de-asserted latency
Min. Typ. Max. Units
—
40
—
ns
—
20
—
ns
—
20
—
ns
10
—
—
ns
10
—
—
ns
0
—
—
ns
0
—
—
ns
—
72
—
ns
—
72
—
ns
 2016 Microchip Technology Inc.
DS00002264A-page 41