English
Language : 

PIC12F635 Datasheet, PDF (40/196 Pages) Microchip Technology – 8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY
PIC12F635/PIC16F636/639
REGISTER 3-2:
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
U-0
R/W-1 R/W-1 R/W-0
R-1
R-0
R-0
—
IRCF2
IRCF1
IRCF0 OSTS(1)
HTS
LTS
bit 7
Unimplemented: Read as ‘0’
IRCF<2:0>: Nominal Internal Oscillator Frequency Select bits
000 = 31 kHz
001 = 125 kHz
010 = 250 kHz
011 = 500 kHz
100 = 1 MHz
101 = 2 MHz
110 = 4 MHz
111 = 8 MHz
OSTS: Oscillator Start-up Time-out Status bit(1)
1 = Device is running from the external system clock defined by FOSC<2:0>
0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC)
HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit
1 = HFINTOSC is stable
0 = HFINTOSC is not stable
LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SCS: System Clock Select bit
1 = Internal oscillator is used for system clock
0 = Clock source defined by FOSC<2:0>
R/W-0
SCS
bit 0
Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator
mode or Fail-Safe mode is enabled.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
TABLE 3-2: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOD,
WUR
Value on
all other
Resets
0Ch
PIR1
EEIF LVDIF CRIF C2IF C1IF OSFIF — TMR1IF 0000 00-0 0000 00-0
8Ch
PIE1
EEIE LVDIE CRIE C2IE C1IE OSFIE — TMR1IE 0000 00-0 0000 00-0
8Fh
OSCCON
— IRCF2 IRCF1 IRCF0 OSTS HTS LTS SCS -110 x000 -110 x000
90h
OSCTUNE
—
—
—
TUN4 TUN3 TUN2 TUN1 TUN0 ---0 0000 ---u uuuu
2007h(1) CONFIG
CPD
CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0
—
—
Legend: x = unknown, u = unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Note 1: See Register 12-1 for operation of all Configuration Word register bits.
DS41232B-page 38
Preliminary
© 2005 Microchip Technology Inc.