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24AA1025_13 Datasheet, PDF (4/28 Pages) Microchip Technology – 1024K I2C Serial EEPROM
24AA1025/24LC1025/24FC1025
AC CHARACTERISTICS (Continued)
Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C
Automotive (E): Vcc = +2.5V to 5.5V TA = -40°C to +125°C
Param.
No.
Sym.
Characteristic
Min.
Max. Units
Conditions
11
TSU:WP WP setup time
4000
—
ns 1.7V  VCC  2.5V
4000
—
2.5V  VCC  4.5V, E-temp
600
—
2.5V  VCC  5.5V
600
—
1.8V  VCC  2.5V (24FC1025 only)
600
—
2.5V  VCC  5.5V (24FC1025 only)
12
THD:WP WP hold time
4700
—
ns 1.7V  VCC  2.5V
4700
—
2.5V  VCC  4.5V, E-temp
1300
—
2.5V  VCC  5.5V
1300
—
1.8V  VCC  2.5V (24FC1025 only)
1300
—
2.5V  VCC  5.5V (24FC1025 only)
13
TAA
Output valid from clock
(Note 2)
—
3500
ns 1.7V  VCC  2.5V
—
3500
2.5V  VCC  4.5V, E-temp
—
900
2.5V  VCC  5.5V
—
900
1.8V  VCC  2.5V (24FC1025 only)
—
400
2.5V  VCC  5.5V (24FC1025 only)
14
TBUF Bus free time: Time the bus
must be free before a new
transmission can start
4700
4700
1300
1300
500
—
ns 1.7V  VCC  2.5V
—
2.5V  VCC  4.5V, E-temp
—
2.5V  VCC  5.5V
—
1.8V  VCC  2.5V (24FC1025 only)
—
2.5V  VCC  5.5V (24FC1025 only)
15
TSP
Input filter spike suppression
—
(SDA and SCL pins)
50
ns All except 24FC1025 (Note 1 and Note 3)
16
TWC
Write cycle time (byte or page)
—
5
ms —
17
Endurance
1,000,000
—
cycles Page mode, 25°C, VCC = 5.5V (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
5
2
D3
4
SCL
SDA
IN
SDA
OUT
7
3
6
15
8
9
13
10
14
(protected)
WP
11
12
(unprotected)
DS20001941L-page 4
 2005-2013 Microchip Technology Inc.