PIC12F1840 Datasheet, PDF (369/376 Pages) Microchip Technology – 8-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC12F/LF1840
Associated Registers
Receive..................................................... 291
Transmit.................................................... 290
Reception.......................................................... 291
Transmission .................................................... 290
Extended Instruction Set
ADDFSR ................................................................... 309
F
Fail-Safe Clock Monitor....................................................... 59
Fail-Safe Condition Clearing ....................................... 59
Fail-Safe Detection ..................................................... 59
Fail-Safe Operation..................................................... 59
Reset or Wake-up from Sleep..................................... 59
Firmware Instructions........................................................ 305
Fixed Voltage Reference (FVR) ........................................ 123
Associated Registers ................................................ 124
Flash Program Memory ...................................................... 97
Erasing...................................................................... 102
Modifying................................................................... 106
Writing....................................................................... 102
FSR Register ................ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33
FVRCON (Fixed Voltage Reference Control) Register ..... 124
I
I²C Mode (MSSPx)
Acknowledge Sequence Timing................................ 251
Bus Collision
During a Repeated Start Condition ................... 256
During a Stop Condition.................................... 257
Effects of a Reset...................................................... 252
I²C Clock Rate w/BRG.............................................. 259
Master Mode
Operation .......................................................... 243
Reception.......................................................... 249
Start Condition Timing .............................. 245, 246
Transmission .................................................... 247
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 252
Multi-Master Mode .................................................... 252
Read/Write Bit Information (R/W Bit) ........................ 228
Slave Mode
Transmission .................................................... 233
Sleep Operation ........................................................ 252
Stop Condition Timing............................................... 251
INDF Register ............... 24, 25, 26, 27, 28, 29, 30, 31, 32, 33
Indirect Addressing ............................................................. 37
Instruction Format ............................................................. 306
Instruction Set ................................................................... 305
ADDLW ..................................................................... 309
ADDWF..................................................................... 309
ADDWFC .................................................................. 309
ANDLW ..................................................................... 309
ANDWF..................................................................... 309
BRA........................................................................... 310
CALL ......................................................................... 311
CALLW...................................................................... 311
LSLF ......................................................................... 313
LSRF......................................................................... 313
MOVF........................................................................ 313
MOVIW ..................................................................... 314
MOVLB ..................................................................... 314
MOVWI ..................................................................... 315
OPTION .................................................................... 315
RESET ...................................................................... 315
SUBWFB................................................................... 317
TRIS ......................................................................... 318
BCF .......................................................................... 310
BSF........................................................................... 310
BTFSC...................................................................... 310
BTFSS ...................................................................... 310
CALL......................................................................... 311
CLRF ........................................................................ 311
CLRW ....................................................................... 311
CLRWDT .................................................................. 311
COMF ....................................................................... 311
DECF........................................................................ 311
DECFSZ ................................................................... 312
GOTO ....................................................................... 312
INCF ......................................................................... 312
INCFSZ..................................................................... 312
IORLW ...................................................................... 312
IORWF...................................................................... 312
MOVLW .................................................................... 314
MOVWF.................................................................... 314
NOP.......................................................................... 315
RETFIE..................................................................... 316
RETLW ..................................................................... 316
RETURN................................................................... 316
RLF........................................................................... 316
RRF .......................................................................... 317
SLEEP ...................................................................... 317
SUBLW..................................................................... 317
SUBWF..................................................................... 317
SWAPF..................................................................... 318
XORLW .................................................................... 318
XORWF .................................................................... 318
INTCON Register................................................................ 83
Internal Oscillator Block
INTOSC
Specifications ................................................... 335
Internal Sampling Switch (RSS) Impedance ..................... 137
Internet Address ............................................................... 371
Interrupt-On-Change......................................................... 119
Associated Registers................................................ 121
Interrupts ............................................................................ 77
ADC .......................................................................... 132
Associated registers w/ Interrupts .............................. 88
Configuration Word w/ Clock Sources........................ 63
Configuration Word w/ Reference Clock Sources ...... 67
TMR1........................................................................ 167
INTOSC Specifications ..................................................... 335
IOCAF Register ................................................................ 120
IOCAN Register ................................................................ 120
IOCAP Register ................................................................ 120
L
LATA Register .................................................................. 116
Load Conditions................................................................ 333
LSLF ................................................................................. 313
LSRF ................................................................................ 313
M
Master Synchronous Serial Port. See MSSPx
MCLR ................................................................................. 72
Internal........................................................................ 72
MDCARH Register............................................................ 186
MDCARL Register ............................................................ 187
MDCON Register.............................................................. 184
MDSRC Register .............................................................. 185
Memory Organization ......................................................... 15
Data ............................................................................ 17
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Preliminary
DS041441A-page 369