PIC16F1826-I Datasheet, PDF (328/400 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16F/LF1826/27
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Clear f
[ label ] BCF f,b
0 ≤ f ≤ 127
0≤b≤7
0 → (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
BRA
Syntax:
Operands:
Operation:
Status Affected:
Description:
Relative Branch
[ label ] BRA label
[ label ] BRA $+k
-256 ≤ label - PC + 1 ≤ 255
-256 ≤ k ≤ 255
(PC) + 1 + k → PC
None
Add the signed 9-bit literal ‘k’ to the
PC. Since the PC will have incre-
mented to fetch the next instruction,
the new address will be PC + 1 + k.
This instruction is a two-cycle instruc-
tion. This branch has a limited range.
BRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Relative Branch with W
[ label ] BRW
None
(PC) + (W) → PC
None
Add the contents of W (unsigned) to
the PC. Since the PC will have incre-
mented to fetch the next instruction,
the new address will be PC + 1 + (W).
This instruction is a two-cycle instruc-
tion.
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Set f
[ label ] BSF f,b
0 ≤ f ≤ 127
0≤b≤7
1 → (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 ≤ f ≤ 127
0≤b≤7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’, in register ‘f’, is ‘0’, the next
instruction is discarded, and a NOP is
executed instead, making this a
2-cycle instruction.
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0 ≤ f ≤ 127
0≤b<7
skip if (f<b>) = 1
None
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next
instruction is discarded and a NOP is
executed instead, making this a
2-cycle instruction.
DS41391B-page 328
Preliminary
© 2009 Microchip Technology Inc.