MCP45HVX1 Datasheet, PDF (32/100 Pages) Microchip Technology – Single-Resistor Network

MCP45HVX1
4.3 Control Module
The control module controls the following functionality:
• Shutdown
• Wiper Latch
4.3.1 SHUTDOWN
The MCP45HVX1 has two methods to disconnect the
terminal’s pins (P0A, P0W, and P0B) from the resistor
network. These are:
• Hardware Shutdown pin (SHDN)
• Terminal Control Register (TCON)
4.3.1.1 Hardware Shutdown Pin Operation
The SHDN pin has the same functionality as
Microchip’s family of standard voltage devices. When
the SHDN pin is Low, the P0A terminal will disconnect
(become open) while the P0W terminal simultaneously
connects to the P0B terminal (see Figure 4-5).
Note:
When the SHDN pin is Active (V_IL), the
state of the TCON register bits is
overridden (ignored). When the state of
the SHDN pin returns to the Inactive state
(V_IH), the TCON register bits return to
controlling the terminal connection state.
That is, the value in the TCON register is
not corrupted.
The Hardware Shutdown Pin mode does not corrupt
the volatile Wiper register. When Shutdown is exited,
the device returns to the wiper setting specified by the
volatile wiper value. See Section 5.7 for additional
description details.
Note:
When the SHDN pin is active, the serial
interface is not disabled, and serial inter-
face activity is executed.
A
4.3.1.2 Terminal Control Register
The Terminal Control (TCON) register allows the
device’s terminal pins to be independently removed
from the application circuit. These terminal control
settings do not modify the wiper setting values. Also,
this has no effect on the serial interface and the
memory/wipers are still under full user control.
The resistor network has four TCON bits associated
with it. One bit for each terminal (A, W, and B) and one
to have a software configuration that matches the
configuration of the SHDN pin. These bits are named
R0A, R0W, R0B, and R0HW. Register 4-1 describes
the operation of the R0HW, R0A, R0B, and R0W bits.
Note:
When the R0HW bit forces the resistor
network into the hardware SHDN state,
the state of the TCON register R0A, R0W,
and R0B bits is overridden (ignored).
When the state of the R0HW bit no longer
forces the resistor network into the
hardware SHDN state, the TCON register
R0A, R0W, and R0B bits return to
controlling the terminal connection state.
That is, the R0HW bit does not corrupt the
state of the R0A, R0W, and R0B bits.
Figure 4-6 shows how the SHDN pin signal and the
R0HW bit signal interact to control the hardware
shutdown of each resistor network (independently).
SHDN (from pin)
R0HW
(from TCON register)
To Pot 0 Hardware
Shutdown Control
FIGURE 4-6:
Interaction.
R0HW bit and SHDN pin
W
B
FIGURE 4-5:
Hardware Shutdown
Resistor Network Configuration.
DS20005304A-page 32
 2014 Microchip Technology Inc.