PIC24HJXXXGPX06A Datasheet, PDF (31/294 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06A/X08A/X10A
4.0 MEMORY ORGANIZATION
Note:
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H Fam-
ily Reference Manual”, Section 3. “Data
Memory” (DS70237), which is available
from the Microchip website (www.micro-
chip.com).
The PIC24HJXXXGPX06A/X08A/X10A architecture
features separate program and data memory spaces
and buses. This architecture also allows the direct
access of program memory from the data space during
code execution.
4.1 Program Address Space
The program address memory space of the
PIC24HJXXXGPX06A/X08A/X10A devices is 4M instruc-
tions. The space is addressable by a 24-bit value derived
from either the 23-bit Program Counter (PC) during pro-
gram execution, or from table operation or data space
remapping as described in Section 4.4 “Interfacing Pro-
gram and Data Memory Spaces”.
User access to the program memory space is restricted
to the lower half of the address range (0x000000 to
0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space.
Memory maps for the PIC24HJXXXGPX06A/X08A/
X10A family of devices are shown in Figure 4-1.
FIGURE 4-1: PROGRAM MEMORY MAP FOR PIC24HJXXXGPX06A/X08A/X10A FAMILY DEVICES
PIC24HJ64XXXXXA
GOTO Instruction
Reset Address
Interrupt Vector Table
Reserved
Alternate Vector Table
User Program
Flash Memory
(22K instructions)
PIC24HJ128XXXXXA
GOTO Instruction
Reset Address
Interrupt Vector Table
Reserved
Alternate Vector Table
User Program
Flash Memory
(44K instructions)
PIC24HJ256XXXXXA
GOTO Instruction
Reset Address
Interrupt Vector Table
Reserved
Alternate Vector Table
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
User Program
Flash Memory
(88K instructions)
0x00ABFE
0x00AC00
0x0157FE
0x015800
Unimplemented
(Read ‘0’s)
Unimplemented
(Read ‘0’s)
Unimplemented
(Read ‘0’s)
0x02ABFE
0x02AC00
0x7FFFFE
0x800000
Reserved
Device Configuration
Registers
Reserved
Reserved
Device Configuration
Registers
Reserved
Reserved
Device Configuration
Registers
0xF7FFFE
0xF80000
0xF80017
0xF80010
Reserved
DEVID (2)
© 2009 Microchip Technology Inc.
DEVID (2)
Preliminary
DEVID (2)
0xFEFFFE
0xFF0000
0xFFFFFE
DS70592A-page 29