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PIC18F6520 Datasheet, PDF (3/380 Pages) Microchip Technology – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D | |||
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PIC18F6520/8520/6620/
8620/6720/8720
64/80-Pin High-Performance, 256 Kbit to 1 Mbit
Enhanced Flash Microcontrollers with A/D
High-Performance RISC CPU:
⢠C compiler optimized architecture/instruction set:
- Source code compatible with the PIC16 and
PIC17 instruction sets
⢠Linear program memory addressing to 128 Kbytes
⢠Linear data memory addressing to 3840 bytes
⢠1 Kbyte of data EEPROM
⢠Up to 10 MIPs operation:
- DC â 40 MHz osc./clock input
- 4 MHz â 10 MHz osc./clock input with PLL active
⢠16-bit wide instructions, 8-bit wide data path
⢠Priority levels for interrupts
⢠31-level, software accessible hardware stack
⢠8 x 8 Single Cycle Hardware Multiplier
External Memory Interface
(PIC18F8X20 Devices Only):
⢠Address capability of up to 2 Mbytes
⢠16-bit interface
Peripheral Features:
⢠High current sink/source 25 mA/25 mA
⢠Four external interrupt pins
⢠Timer0 module: 8-bit/16-bit timer/counter
⢠Timer1 module: 16-bit timer/counter
⢠Timer2 module: 8-bit timer/counter
⢠Timer3 module: 16-bit timer/counter
⢠Timer4 module: 8-bit timer/counter
⢠Secondary oscillator clock option â Timer1/Timer3
⢠Five Capture/Compare/PWM (CCP) modules:
- Capture is 16-bit, max. resolution 6.25 ns (TCY/16)
- Compare is 16-bit, max. resolution 100 ns (TCY)
- PWM output: PWM resolution is 1 to 10-bit
⢠Master Synchronous Serial Port (MSSP) module
with two modes of operation:
- 3-wire SPI⢠(supports all 4 SPI modes)
- I2C⢠Master and Slave mode
⢠Two Addressable USART modules:
- Supports RS-485 and RS-232
⢠Parallel Slave Port (PSP) module
Analog Features:
⢠10-bit, up to 16-channel Analog-to-Digital
Converter (A/D):
- Conversion available during Sleep
⢠Programmable 16-level Low-Voltage Detection
(LVD) module:
- Supports interrupt on Low-Voltage Detection
⢠Programmable Brown-out Reset (PBOR)
⢠Dual analog comparators:
- Programmable input/output configuration
Special Microcontroller Features:
⢠100,000 erase/write cycle Enhanced Flash
program memory typical
⢠1,000,000 erase/write cycle Data EEPROM
memory typical
⢠1 second programming time
⢠Flash/Data EEPROM Retention: > 40 years
⢠Self-reprogrammable under software control
⢠Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
⢠Watchdog Timer (WDT) with its own On-Chip
RC Oscillator for reliable operation
⢠Programmable code protection
⢠Power saving Sleep mode
⢠Selectable oscillator options including:
- 4X Phase Lock Loop (of primary oscillator)
- Secondary Oscillator (32 kHz) clock input
⢠In-Circuit Serial Programming⢠(ICSPâ¢) via
two pins
⢠MPLAB® In-Circuit Debug (ICD) via two pins
CMOS Technology:
⢠Low-power, high-speed Flash technology
⢠Fully static design
⢠Wide operating voltage range (2.0V to 5.5V)
⢠Industrial and Extended temperature ranges
Device
Program Memory Data Memory
Bytes
# Single-Word
Instructions
SRAM EEPROM
(bytes) (bytes)
I/O
10-bit
A/D
(ch)
CCP
(PWM)
MSSP
SPI
Master
I2C
USART
Timers
8-bit/16-bit
Ext
Bus
Max
FOSC
(MHz)
PIC18F6520 32K
16384
2048 1024 52 12
5
Y
Y
2
PIC18F6620 64K
32768
3840 1024 52 12
5
Y
Y
2
PIC18F6720 128K
65536
3840 1024 52 12
5
Y
Y
2
PIC18F8520 32K
16384
2048 1024 68 16
5
Y
Y
2
PIC18F8620 64K
32768
3840 1024 68 16
5
Y
Y
2
PIC18F8720 128K
65536
3840 1024 68 16
5
Y
Y
2
2/3
N 40
2/3
N 25
2/3
N 25
2/3
Y 40
2/3
Y 25
2/3
Y 25
 2004 Microchip Technology Inc.
DS39609B-page 1
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